[PATCH] D51518: [WebAssembly] Add missing SIMD instruction attributes

[Thomas Lively via Phabricator via llvm-commits]

tlively updated this revision to Diff 163433.
tlively added a comment.

- Remove isAsCheapAsAMove from mem ops


Repository:
  rL LLVM

https://reviews.llvm.org/D51518

Files:
  lib/Target/WebAssembly/WebAssemblyInstrSIMD.td


Index: lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
===================================================================
--- lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -19,6 +19,7 @@
 def LaneIdx#SIZE : ImmLeaf<i32, "return 0 <= Imm && Imm < "#SIZE#";">;
 
 multiclass ConstVec<ValueType vec_t, dag ops, dag pat, string args> {
+  let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 in
   defm CONST_V128_#vec_t : SIMD_I<(outs V128:$dst), ops, (outs), ops,
                                   [(set V128:$dst, (vec_t pat))],
                                   "v128.const\t$dst, "#args,


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