[PATCH] D51502: [X86] Fix register resizings for inline assembly register operands.
Nick Desaulniers via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 30 15:28:54 PDT 2018
nickdesaulniers added a comment.
Testing this patch locally, I think the register choice is indeed important. Consider the following test case:
long long foo () {
register long long x asm("edx");
asm("call bar": "=r"(x));
return x;
}
long long bar () {
return 0x0011223344556677;
}
GCC produces the following disassembly:
00000000 <foo>:
0: e8 fc ff ff ff call 1 <foo+0x1>
5: 89 d0 mov %edx,%eax
7: 89 ca mov %ecx,%edx
9: c3 ret
a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
00000010 <bar>:
10: b8 77 66 55 44 mov $0x44556677,%eax
15: ba 33 22 11 00 mov $0x112233,%edx
1a: c3
Clang+this patch produces the following disassembly (with my annotations, read bar first, then foo):
00000000 <foo>:
0: 56 push %esi
1: e8 0a 00 00 00 call 10 <bar>
6: 89 d0 mov %edx,%eax
// Ok, we read the return value from the correct register
8: 89 f2 mov %esi,%edx
// blam! clobber it! oops!
a: 5e pop %esi
b: c3 ret
c: 0f 1f 40 00 nopl 0x0(%eax)
00000010 <bar>:
// ok so 64b return values are passed in %eax, then %edx for -m32.
10: b8 77 66 55 44 mov $0x44556677,%eax
15: ba 33 22 11 00 mov $0x112233,%edx
1a: c3 ret
Repository:
rL LLVM
https://reviews.llvm.org/D51502
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