[llvm] r340417 - AMDGPU: bump AS.MAX_COMMON_ADDRESS to 6 since 32-bit addr space
Hans Wennborg via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 30 01:49:10 PDT 2018
Merged to 7.0 in r341041.
On Wed, Aug 22, 2018 at 6:08 PM, Samuel Pitoiset via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
> Author: hakzsam
> Date: Wed Aug 22 09:08:48 2018
> New Revision: 340417
>
> URL: http://llvm.org/viewvc/llvm-project?rev=340417&view=rev
> Log:
> AMDGPU: bump AS.MAX_COMMON_ADDRESS to 6 since 32-bit addr space
>
> 32-bit constant address space is declared as 6, so the
> maximum number of address spaces is 6, not 5.
>
> Fixes "LLVM ERROR: Pointer address space out of range".
>
> v5: rename MAX_COMMON_ADDRESS to MAX_AMDGPU_ADDRESS
> v4: - fix compilation issues
> - fix out of bounds access
> v3: use static_assert()
> v2: add a very simple test for 32-bit addr space
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106630
>
> Modified:
> llvm/trunk/lib/Target/AMDGPU/AMDGPU.h
> llvm/trunk/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
> llvm/trunk/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
> llvm/trunk/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
>
> Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPU.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPU.h?rev=340417&r1=340416&r2=340417&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AMDGPU/AMDGPU.h (original)
> +++ llvm/trunk/lib/Target/AMDGPU/AMDGPU.h Wed Aug 22 09:08:48 2018
> @@ -229,7 +229,7 @@ struct AMDGPUAS {
>
> enum : unsigned {
> // The maximum value for flat, generic, local, private, constant and region.
> - MAX_COMMON_ADDRESS = 5,
> + MAX_AMDGPU_ADDRESS = 6,
>
> GLOBAL_ADDRESS = 1, ///< Address space for global memory (RAT0, VTX0).
> CONSTANT_ADDRESS = 4, ///< Address space for constant memory (VTX2)
>
> Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp?rev=340417&r1=340416&r2=340417&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp (original)
> +++ llvm/trunk/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp Wed Aug 22 09:08:48 2018
> @@ -50,47 +50,51 @@ void AMDGPUAAWrapperPass::getAnalysisUsa
> AMDGPUAAResult::ASAliasRulesTy::ASAliasRulesTy(AMDGPUAS AS_, Triple::ArchType Arch_)
> : Arch(Arch_), AS(AS_) {
> // These arrarys are indexed by address space value
> - // enum elements 0 ... to 5
> - static const AliasResult ASAliasRulesPrivIsZero[6][6] = {
> - /* Private Global Constant Group Flat Region*/
> - /* Private */ {MayAlias, NoAlias , NoAlias , NoAlias , MayAlias, NoAlias},
> - /* Global */ {NoAlias , MayAlias, MayAlias, NoAlias , MayAlias, NoAlias},
> - /* Constant */ {NoAlias , MayAlias, MayAlias, NoAlias , MayAlias, NoAlias},
> - /* Group */ {NoAlias , NoAlias , NoAlias , MayAlias, MayAlias, NoAlias},
> - /* Flat */ {MayAlias, MayAlias, MayAlias, MayAlias, MayAlias, MayAlias},
> - /* Region */ {NoAlias , NoAlias , NoAlias , NoAlias , MayAlias, MayAlias}
> + // enum elements 0 ... to 6
> + static const AliasResult ASAliasRulesPrivIsZero[7][7] = {
> + /* Private Global Constant Group Flat Region Constant 32-bit */
> + /* Private */ {MayAlias, NoAlias , NoAlias , NoAlias , MayAlias, NoAlias , NoAlias},
> + /* Global */ {NoAlias , MayAlias, MayAlias, NoAlias , MayAlias, NoAlias , MayAlias},
> + /* Constant */ {NoAlias , MayAlias, MayAlias, NoAlias , MayAlias, NoAlias , MayAlias},
> + /* Group */ {NoAlias , NoAlias , NoAlias , MayAlias, MayAlias, NoAlias , NoAlias},
> + /* Flat */ {MayAlias, MayAlias, MayAlias, MayAlias, MayAlias, MayAlias, MayAlias},
> + /* Region */ {NoAlias , NoAlias , NoAlias , NoAlias , MayAlias, MayAlias, NoAlias},
> + /* Constant 32-bit */ {NoAlias , MayAlias, MayAlias, NoAlias , MayAlias, NoAlias , MayAlias}
> };
> - static const AliasResult ASAliasRulesGenIsZero[6][6] = {
> - /* Flat Global Region Group Constant Private */
> - /* Flat */ {MayAlias, MayAlias, MayAlias, MayAlias, MayAlias, MayAlias},
> - /* Global */ {MayAlias, MayAlias, NoAlias , NoAlias , MayAlias, NoAlias},
> - /* Region */ {MayAlias, NoAlias , NoAlias , NoAlias, MayAlias, NoAlias},
> - /* Group */ {MayAlias, NoAlias , NoAlias , MayAlias, NoAlias , NoAlias},
> - /* Constant */ {MayAlias, MayAlias, MayAlias, NoAlias , NoAlias, NoAlias},
> - /* Private */ {MayAlias, NoAlias , NoAlias , NoAlias , NoAlias , MayAlias}
> + static const AliasResult ASAliasRulesGenIsZero[7][7] = {
> + /* Flat Global Region Group Constant Private Constant 32-bit */
> + /* Flat */ {MayAlias, MayAlias, MayAlias, MayAlias, MayAlias, MayAlias, MayAlias},
> + /* Global */ {MayAlias, MayAlias, NoAlias , NoAlias , MayAlias, NoAlias , MayAlias},
> + /* Region */ {MayAlias, NoAlias , NoAlias , NoAlias, MayAlias, NoAlias , MayAlias},
> + /* Group */ {MayAlias, NoAlias , NoAlias , MayAlias, NoAlias , NoAlias , NoAlias},
> + /* Constant */ {MayAlias, MayAlias, MayAlias, NoAlias , NoAlias, NoAlias , MayAlias},
> + /* Private */ {MayAlias, NoAlias , NoAlias , NoAlias , NoAlias , MayAlias, NoAlias},
> + /* Constant 32-bit */ {MayAlias, MayAlias, MayAlias, NoAlias , MayAlias, NoAlias , NoAlias}
> };
> - assert(AS.MAX_COMMON_ADDRESS <= 5);
> + static_assert(AMDGPUAS::MAX_AMDGPU_ADDRESS <= 6, "Addr space out of range");
> if (AS.FLAT_ADDRESS == 0) {
> - assert(AS.GLOBAL_ADDRESS == 1 &&
> - AS.REGION_ADDRESS == 2 &&
> - AS.LOCAL_ADDRESS == 3 &&
> - AS.CONSTANT_ADDRESS == 4 &&
> - AS.PRIVATE_ADDRESS == 5);
> + assert(AS.GLOBAL_ADDRESS == 1 &&
> + AS.REGION_ADDRESS == 2 &&
> + AS.LOCAL_ADDRESS == 3 &&
> + AS.CONSTANT_ADDRESS == 4 &&
> + AS.PRIVATE_ADDRESS == 5 &&
> + AS.CONSTANT_ADDRESS_32BIT == 6);
> ASAliasRules = &ASAliasRulesGenIsZero;
> } else {
> - assert(AS.PRIVATE_ADDRESS == 0 &&
> - AS.GLOBAL_ADDRESS == 1 &&
> - AS.CONSTANT_ADDRESS == 2 &&
> - AS.LOCAL_ADDRESS == 3 &&
> - AS.FLAT_ADDRESS == 4 &&
> - AS.REGION_ADDRESS == 5);
> + assert(AS.PRIVATE_ADDRESS == 0 &&
> + AS.GLOBAL_ADDRESS == 1 &&
> + AS.CONSTANT_ADDRESS == 2 &&
> + AS.LOCAL_ADDRESS == 3 &&
> + AS.FLAT_ADDRESS == 4 &&
> + AS.REGION_ADDRESS == 5 &&
> + AS.CONSTANT_ADDRESS_32BIT == 6);
> ASAliasRules = &ASAliasRulesPrivIsZero;
> }
> }
>
> AliasResult AMDGPUAAResult::ASAliasRulesTy::getAliasResult(unsigned AS1,
> unsigned AS2) const {
> - if (AS1 > AS.MAX_COMMON_ADDRESS || AS2 > AS.MAX_COMMON_ADDRESS) {
> + if (AS1 > AS.MAX_AMDGPU_ADDRESS || AS2 > AS.MAX_AMDGPU_ADDRESS) {
> if (Arch == Triple::amdgcn)
> report_fatal_error("Pointer address space out of range");
> return AS1 == AS2 ? MayAlias : NoAlias;
>
> Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h?rev=340417&r1=340416&r2=340417&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h (original)
> +++ llvm/trunk/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h Wed Aug 22 09:08:48 2018
> @@ -63,7 +63,7 @@ private:
> private:
> Triple::ArchType Arch;
> AMDGPUAS AS;
> - const AliasResult (*ASAliasRules)[6][6];
> + const AliasResult (*ASAliasRules)[7][7];
> } ASAliasRules;
> };
>
>
> Modified: llvm/trunk/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll?rev=340417&r1=340416&r2=340417&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll (original)
> +++ llvm/trunk/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll Wed Aug 22 09:08:48 2018
> @@ -19,3 +19,15 @@ define void @test_global_vs_constant(i8
> ret void
> }
>
> +; CHECK: MayAlias: i8 addrspace(1)* %p1, i8 addrspace(6)* %p
> +
> +define void @test_constant_32bit_vs_global(i8 addrspace(6)* %p, i8 addrspace(1)* %p1) {
> + ret void
> +}
> +
> +; CHECK: MayAlias: i8 addrspace(4)* %p1, i8 addrspace(6)* %p
> +
> +define void @test_constant_32bit_vs_constant(i8 addrspace(6)* %p, i8 addrspace(4)* %p1) {
> + ret void
> +}
> +
>
>
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