[PATCH] D48582: Reverse subregister saved loops in register usage info collector.
Dave Airlie via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 29 15:25:56 PDT 2018
airlied updated this revision to Diff 163206.
airlied added a comment.
Rebased onto latest master. I require someone else to push this as I don't have commit rights.
Repository:
rL LLVM
https://reviews.llvm.org/D48582
Files:
lib/CodeGen/RegUsageInfoCollector.cpp
Index: lib/CodeGen/RegUsageInfoCollector.cpp
===================================================================
--- lib/CodeGen/RegUsageInfoCollector.cpp
+++ lib/CodeGen/RegUsageInfoCollector.cpp
@@ -166,28 +166,27 @@
}
// Insert any register fully saved via subregisters.
- for (unsigned PReg = 1, PRegE = TRI.getNumRegs(); PReg < PRegE; ++PReg) {
- if (SavedRegs.test(PReg))
- continue;
-
- // Check if PReg is fully covered by its subregs.
- bool CoveredBySubRegs = false;
- for (const TargetRegisterClass *RC : TRI.regclasses())
- if (RC->CoveredBySubRegs && RC->contains(PReg)) {
- CoveredBySubRegs = true;
- break;
- }
- if (!CoveredBySubRegs)
- continue;
-
- // Add PReg to SavedRegs if all subregs are saved.
- bool AllSubRegsSaved = true;
- for (MCSubRegIterator SR(PReg, &TRI, false); SR.isValid(); ++SR)
- if (!SavedRegs.test(*SR)) {
- AllSubRegsSaved = false;
- break;
- }
- if (AllSubRegsSaved)
- SavedRegs.set(PReg);
+ for (const TargetRegisterClass *RC : TRI.regclasses()) {
+ if (!RC->CoveredBySubRegs)
+ continue;
+
+ for (unsigned PReg = 1, PRegE = TRI.getNumRegs(); PReg < PRegE; ++PReg) {
+ if (SavedRegs.test(PReg))
+ continue;
+
+ // Check if PReg is fully covered by its subregs.
+ if (!RC->contains(PReg))
+ continue;
+
+ // Add PReg to SavedRegs if all subregs are saved.
+ bool AllSubRegsSaved = true;
+ for (MCSubRegIterator SR(PReg, &TRI, false); SR.isValid(); ++SR)
+ if (!SavedRegs.test(*SR)) {
+ AllSubRegsSaved = false;
+ break;
+ }
+ if (AllSubRegsSaved)
+ SavedRegs.set(PReg);
+ }
}
}
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