[PATCH] D51383: [WebAssembly] SIMD loads and stores

[Thomas Lively via Phabricator via llvm-commits]

tlively added inline comments.


================
Comment at: lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h:310
+  case WebAssembly::STORE_v2f64:
+  case WebAssembly::STORE_v2f64_S:
   case WebAssembly::ATOMIC_LOAD_I64:
----------------
I'm not actually sure these are in the right place. It looks like this switch returns the log of the default alignment for each type? The spec proposal says, "the memory access size is 16 bytes which is also the natural alignment." Am I reading that correctly to mean that these cases should return 4, not 3?


Repository:
  rL LLVM

https://reviews.llvm.org/D51383