[llvm] r340866 - AMDGPU: Don't delete instructions if S_ENDPGM has implicit uses

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Tue Aug 28 11:55:55 2018
New Revision: 340866

URL: http://llvm.org/viewvc/llvm-project?rev=340866&view=rev
Log:
AMDGPU: Don't delete instructions if S_ENDPGM has implicit uses

This can leave behind the uses with the defs removed.
Since this should only really happen in tests, it's not worth the
effort of trying to handle this.

Modified:
    llvm/trunk/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
    llvm/trunk/test/CodeGen/AMDGPU/endpgm-dce.mir

Modified: llvm/trunk/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp?rev=340866&r1=340865&r2=340866&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp Tue Aug 28 11:55:55 2018
@@ -119,7 +119,14 @@ bool SIOptimizeExecMaskingPreRA::runOnMa
 
     // Try to remove unneeded instructions before s_endpgm.
     if (MBB.succ_empty()) {
-      if (MBB.empty() || MBB.back().getOpcode() != AMDGPU::S_ENDPGM)
+      if (MBB.empty())
+        continue;
+
+      // Skip this if the endpgm has any implicit uses, otherwise we would need
+      // to be careful to update / remove them.
+      MachineInstr &Term = MBB.back();
+      if (Term.getOpcode() != AMDGPU::S_ENDPGM ||
+          Term.getNumOperands() != 0)
         continue;
 
       SmallVector<MachineBasicBlock*, 4> Blocks({&MBB});

Modified: llvm/trunk/test/CodeGen/AMDGPU/endpgm-dce.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/endpgm-dce.mir?rev=340866&r1=340865&r2=340866&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/endpgm-dce.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/endpgm-dce.mir Tue Aug 28 11:55:55 2018
@@ -295,3 +295,20 @@ body:             |
   bb.2:
     S_ENDPGM
 ...
+
+# GCN-LABEL: name: implicit_use_on_s_endpgm
+# GCN: V_ADD_I32
+# GCN: COPY
+# GCN: V_ADDC_U32
+# GCN: S_ENDPGM implicit %3
+name: implicit_use_on_s_endpgm
+tracksRegLiveness: true
+
+body:             |
+  bb.0:
+    dead %0:vgpr_32 = V_ADD_I32_e32 12345, undef %1:vgpr_32, implicit-def $vcc, implicit $exec
+    %2:sreg_64_xexec = COPY $vcc
+    %3:vgpr_32, dead %4:sreg_64_xexec = V_ADDC_U32_e64 undef %5:vgpr_32, undef %6:vgpr_32, %2, implicit $exec
+    S_ENDPGM implicit %3
+
+...