[PATCH] D39386: [Power9] Allow gpr callee saved spills in prologue to vector registers rather than stack
Zaara Syeda via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 28 10:44:07 PDT 2018
syzaara updated this revision to Diff 162899.
https://reviews.llvm.org/D39386
Files:
llvm/include/llvm/CodeGen/MachineFrameInfo.h
llvm/lib/CodeGen/MIRPrinter.cpp
llvm/lib/CodeGen/PrologEpilogInserter.cpp
llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
llvm/lib/Target/PowerPC/PPCFrameLowering.h
llvm/test/CodeGen/MIR/PowerPC/prolog_vec_spills.mir
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