[PATCH] D51362: [GlobalISel][IRTranslator] Canonicalize G_ICMP to have constant operands last

[Amara Emerson via Phabricator via llvm-commits]

aemerson created this revision.
aemerson added reviewers: qcolombet, dsanders, rtereshin, igorb, tstellar.
Herald added subscribers: kristof.beyls, rovka.
Herald added a reviewer: javed.absar.

This makes selecting immediate instructions simpler. At -O1 or higher this already happens at the IR level, but for -O0 we end up with arbitrary order.


Repository:
  rL LLVM

https://reviews.llvm.org/D51362

Files:
  lib/CodeGen/GlobalISel/IRTranslator.cpp
  test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll


Index: test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
===================================================================
--- test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
+++ test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
@@ -141,13 +141,13 @@
 ; CHECK: %[[reg2:[0-9]+]]:_(s32) = G_CONSTANT i32 2
 ; CHECK: %[[reg1:[0-9]+]]:_(s32) = G_CONSTANT i32 1
 ; CHECK: %[[reg0:[0-9]+]]:_(s32) = G_CONSTANT i32 0
-; CHECK: %[[regicmp100:[0-9]+]]:_(s1) = G_ICMP intpred(eq), %[[reg100]](s32), %0
+; CHECK: %[[regicmp100:[0-9]+]]:_(s1) = G_ICMP intpred(eq), %0(s32), %[[reg100]]
 ; CHECK: G_BRCOND %[[regicmp100]](s1), %[[BB_CASE100]]
 ; CHECK: G_BR %[[BB_NOTCASE100_CHECKNEXT]]
 ;
 ; CHECK: [[BB_NOTCASE100_CHECKNEXT]].{{[a-zA-Z0-9.]+}}:
 ; CHECK-NEXT: successors: %[[BB_CASE200:bb.[0-9]+]](0x40000000), %[[BB_NOTCASE200_CHECKNEXT:bb.[0-9]+]](0x40000000)
-; CHECK: %[[regicmp200:[0-9]+]]:_(s1) = G_ICMP intpred(eq), %[[reg200]](s32), %0
+; CHECK: %[[regicmp200:[0-9]+]]:_(s1) = G_ICMP intpred(eq), %0(s32), %[[reg200]]
 ; CHECK: G_BRCOND %[[regicmp200]](s1), %[[BB_CASE200]]
 ; CHECK: G_BR %[[BB_NOTCASE200_CHECKNEXT]]
 ;
@@ -757,6 +757,18 @@
   ret void
 }
 
+; CHECK-LABEL: name: int_comparison_cst_op0
+; CHECK: [[LHS:%[0-9]+]]:_(s32) = COPY $w0
+; CHECK: [[ADDR:%[0-9]+]]:_(p0) = COPY $x1
+; CHECK: [[CST:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
+; CHECK: [[TST:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[LHS]](s32), [[CST]]
+; CHECK: G_STORE [[TST]](s1), [[ADDR]](p0)
+define void @int_comparison_cst_op0(i32 %a, i1* %addr) {
+  %res = icmp sgt i32 42, %a
+  store i1 %res, i1* %addr
+  ret void
+}
+
 ; CHECK-LABEL: name: ptr_comparison
 ; CHECK: [[LHS:%[0-9]+]]:_(p0) = COPY $x0
 ; CHECK: [[RHS:%[0-9]+]]:_(p0) = COPY $x1
Index: lib/CodeGen/GlobalISel/IRTranslator.cpp
===================================================================
--- lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -304,8 +304,14 @@
   CmpInst::Predicate Pred =
       CI ? CI->getPredicate() : static_cast<CmpInst::Predicate>(
                                     cast<ConstantExpr>(U).getPredicate());
-  if (CmpInst::isIntPredicate(Pred))
+  if (CmpInst::isIntPredicate(Pred)) {
+    // Try to canonicalize constant operands to be last.
+    if (isa<Constant>(U.getOperand(0)) && !isa<Constant>(U.getOperand(1))) {
+      Pred = CmpInst::getSwappedPredicate(Pred);
+      std::swap(Op0, Op1);
+    }
     MIRBuilder.buildICmp(Pred, Res, Op0, Op1);
+  }
   else if (Pred == CmpInst::FCMP_FALSE)
     MIRBuilder.buildCopy(
         Res, getOrCreateVReg(*Constant::getNullValue(CI->getType())));
@@ -377,7 +383,7 @@
   for (auto &CaseIt : SwInst.cases()) {
     const unsigned CaseValueReg = getOrCreateVReg(*CaseIt.getCaseValue());
     const unsigned Tst = MRI->createGenericVirtualRegister(LLTi1);
-    MIRBuilder.buildICmp(CmpInst::ICMP_EQ, Tst, CaseValueReg, SwCondValue);
+    MIRBuilder.buildICmp(CmpInst::ICMP_EQ, Tst, SwCondValue, CaseValueReg);
     MachineBasicBlock &CurMBB = MIRBuilder.getMBB();
     const BasicBlock *TrueBB = CaseIt.getCaseSuccessor();
     MachineBasicBlock &TrueMBB = getMBB(*TrueBB);


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