[llvm] r340793 - [MemorySSA] Add NDEBUG checks to verifiers; NFC

George Burgess IV via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 27 17:32:32 PDT 2018


Author: gbiv
Date: Mon Aug 27 17:32:32 2018
New Revision: 340793

URL: http://llvm.org/viewvc/llvm-project?rev=340793&view=rev
Log:
[MemorySSA] Add NDEBUG checks to verifiers; NFC

verify*() methods are intended to have no side-effects (unless we detect
broken MSSA, in which case they assert()), and all of the other verify
methods are wrapped by `#ifndef NDEBUG`.

Modified:
    llvm/trunk/lib/Analysis/MemorySSA.cpp

Modified: llvm/trunk/lib/Analysis/MemorySSA.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemorySSA.cpp?rev=340793&r1=340792&r2=340793&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/MemorySSA.cpp (original)
+++ llvm/trunk/lib/Analysis/MemorySSA.cpp Mon Aug 27 17:32:32 2018
@@ -1711,6 +1711,7 @@ void MemorySSA::verifyDominationNumbers(
 /// Verify that the order and existence of MemoryAccesses matches the
 /// order and existence of memory affecting instructions.
 void MemorySSA::verifyOrdering(Function &F) const {
+#ifndef NDEBUG
   // Walk all the blocks, comparing what the lookups think and what the access
   // lists think, as well as the order in the blocks vs the order in the access
   // lists.
@@ -1769,6 +1770,7 @@ void MemorySSA::verifyOrdering(Function
     }
     ActualDefs.clear();
   }
+#endif
 }
 
 /// Verify the domination properties of MemorySSA by checking that each
@@ -1811,6 +1813,7 @@ void MemorySSA::verifyUseInDefs(MemoryAc
 /// accesses and verifying that, for each use, it appears in the
 /// appropriate def's use list
 void MemorySSA::verifyDefUses(Function &F) const {
+#ifndef NDEBUG
   for (BasicBlock &B : F) {
     // Phi nodes are attached to basic blocks
     if (MemoryPhi *Phi = getMemoryAccess(&B)) {
@@ -1831,6 +1834,7 @@ void MemorySSA::verifyDefUses(Function &
       }
     }
   }
+#endif
 }
 
 /// Perform a local numbering on blocks so that instruction ordering can be




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