[llvm] r340773 - [x86] add tests for possibly avoiding scalar->vector move; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 27 13:21:33 PDT 2018
Author: spatel
Date: Mon Aug 27 13:21:33 2018
New Revision: 340773
URL: http://llvm.org/viewvc/llvm-project?rev=340773&view=rev
Log:
[x86] add tests for possibly avoiding scalar->vector move; NFC
Added:
llvm/trunk/test/CodeGen/X86/load-scalar-as-vector.ll
Added: llvm/trunk/test/CodeGen/X86/load-scalar-as-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/load-scalar-as-vector.ll?rev=340773&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/load-scalar-as-vector.ll (added)
+++ llvm/trunk/test/CodeGen/X86/load-scalar-as-vector.ll Mon Aug 27 13:21:33 2018
@@ -0,0 +1,437 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE2
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE4
+
+define <4 x i32> @add_op1_constant(i32* %p) nounwind {
+; ALL-LABEL: add_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movl (%rdi), %eax
+; ALL-NEXT: addl $42, %eax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i32, i32* %p
+ %b = add i32 %x, 42
+ %r = insertelement <4 x i32> undef, i32 %b, i32 0
+ ret <4 x i32> %r
+}
+
+define <8 x i16> @add_op0_constant(i16* %p) nounwind {
+; ALL-LABEL: add_op0_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movzwl (%rdi), %eax
+; ALL-NEXT: addl $42, %eax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i16, i16* %p
+ %b = add i16 42, %x
+ %r = insertelement <8 x i16> undef, i16 %b, i32 0
+ ret <8 x i16> %r
+}
+
+define <2 x i64> @sub_op0_constant(i64* %p) nounwind {
+; ALL-LABEL: sub_op0_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movl $42, %eax
+; ALL-NEXT: subq (%rdi), %rax
+; ALL-NEXT: movq %rax, %xmm0
+; ALL-NEXT: retq
+ %x = load i64, i64* %p
+ %b = sub i64 42, %x
+ %r = insertelement <2 x i64> undef, i64 %b, i32 0
+ ret <2 x i64> %r
+}
+
+define <16 x i8> @sub_op1_constant(i8* %p) nounwind {
+; ALL-LABEL: sub_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movb (%rdi), %al
+; ALL-NEXT: addb $-42, %al
+; ALL-NEXT: movzbl %al, %eax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i8, i8* %p
+ %b = sub i8 %x, 42
+ %r = insertelement <16 x i8> undef, i8 %b, i32 0
+ ret <16 x i8> %r
+}
+
+define <4 x i32> @mul_op1_constant(i32* %p) nounwind {
+; ALL-LABEL: mul_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: imull $42, (%rdi), %eax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i32, i32* %p
+ %b = mul i32 %x, 42
+ %r = insertelement <4 x i32> undef, i32 %b, i32 0
+ ret <4 x i32> %r
+}
+
+define <8 x i16> @mul_op0_constant(i16* %p) nounwind {
+; ALL-LABEL: mul_op0_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movzwl (%rdi), %eax
+; ALL-NEXT: imull $42, %eax, %eax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i16, i16* %p
+ %b = mul i16 42, %x
+ %r = insertelement <8 x i16> undef, i16 %b, i32 0
+ ret <8 x i16> %r
+}
+
+define <4 x i32> @and_op1_constant(i32* %p) nounwind {
+; ALL-LABEL: and_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movl (%rdi), %eax
+; ALL-NEXT: andl $42, %eax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i32, i32* %p
+ %b = and i32 %x, 42
+ %r = insertelement <4 x i32> undef, i32 %b, i32 0
+ ret <4 x i32> %r
+}
+
+define <2 x i64> @or_op1_constant(i64* %p) nounwind {
+; ALL-LABEL: or_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movq (%rdi), %rax
+; ALL-NEXT: orq $42, %rax
+; ALL-NEXT: movq %rax, %xmm0
+; ALL-NEXT: retq
+ %x = load i64, i64* %p
+ %b = or i64 %x, 42
+ %r = insertelement <2 x i64> undef, i64 %b, i32 0
+ ret <2 x i64> %r
+}
+
+define <8 x i16> @xor_op1_constant(i16* %p) nounwind {
+; ALL-LABEL: xor_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movzwl (%rdi), %eax
+; ALL-NEXT: xorl $42, %eax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i16, i16* %p
+ %b = xor i16 %x, 42
+ %r = insertelement <8 x i16> undef, i16 %b, i32 0
+ ret <8 x i16> %r
+}
+
+define <4 x i32> @shl_op0_constant(i32* %p) nounwind {
+; ALL-LABEL: shl_op0_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movb (%rdi), %cl
+; ALL-NEXT: movl $42, %eax
+; ALL-NEXT: shll %cl, %eax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i32, i32* %p
+ %b = shl i32 42, %x
+ %r = insertelement <4 x i32> undef, i32 %b, i32 0
+ ret <4 x i32> %r
+}
+
+define <16 x i8> @shl_op1_constant(i8* %p) nounwind {
+; ALL-LABEL: shl_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movb (%rdi), %al
+; ALL-NEXT: shlb $5, %al
+; ALL-NEXT: movzbl %al, %eax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i8, i8* %p
+ %b = shl i8 %x, 5
+ %r = insertelement <16 x i8> undef, i8 %b, i32 0
+ ret <16 x i8> %r
+}
+
+define <2 x i64> @lshr_op0_constant(i64* %p) nounwind {
+; ALL-LABEL: lshr_op0_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movb (%rdi), %cl
+; ALL-NEXT: movl $42, %eax
+; ALL-NEXT: shrq %cl, %rax
+; ALL-NEXT: movq %rax, %xmm0
+; ALL-NEXT: retq
+ %x = load i64, i64* %p
+ %b = lshr i64 42, %x
+ %r = insertelement <2 x i64> undef, i64 %b, i32 0
+ ret <2 x i64> %r
+}
+
+define <4 x i32> @lshr_op1_constant(i32* %p) nounwind {
+; ALL-LABEL: lshr_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movl (%rdi), %eax
+; ALL-NEXT: shrl $17, %eax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i32, i32* %p
+ %b = lshr i32 %x, 17
+ %r = insertelement <4 x i32> undef, i32 %b, i32 0
+ ret <4 x i32> %r
+}
+
+define <8 x i16> @ashr_op0_constant(i16* %p) nounwind {
+; ALL-LABEL: ashr_op0_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movb (%rdi), %cl
+; ALL-NEXT: movw $-42, %ax
+; ALL-NEXT: sarw %cl, %ax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i16, i16* %p
+ %b = ashr i16 -42, %x
+ %r = insertelement <8 x i16> undef, i16 %b, i32 0
+ ret <8 x i16> %r
+}
+
+define <8 x i16> @ashr_op1_constant(i16* %p) nounwind {
+; ALL-LABEL: ashr_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movzwl (%rdi), %eax
+; ALL-NEXT: sarw $7, %ax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i16, i16* %p
+ %b = ashr i16 %x, 7
+ %r = insertelement <8 x i16> undef, i16 %b, i32 0
+ ret <8 x i16> %r
+}
+
+define <4 x i32> @sdiv_op0_constant(i32* %p) nounwind {
+; ALL-LABEL: sdiv_op0_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movl $42, %eax
+; ALL-NEXT: xorl %edx, %edx
+; ALL-NEXT: idivl (%rdi)
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i32, i32* %p
+ %b = sdiv i32 42, %x
+ %r = insertelement <4 x i32> undef, i32 %b, i32 0
+ ret <4 x i32> %r
+}
+
+define <8 x i16> @sdiv_op1_constant(i16* %p) nounwind {
+; ALL-LABEL: sdiv_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movswl (%rdi), %eax
+; ALL-NEXT: imull $-15603, %eax, %ecx # imm = 0xC30D
+; ALL-NEXT: shrl $16, %ecx
+; ALL-NEXT: addl %eax, %ecx
+; ALL-NEXT: movzwl %cx, %eax
+; ALL-NEXT: sarw $5, %cx
+; ALL-NEXT: shrl $15, %eax
+; ALL-NEXT: addl %ecx, %eax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i16, i16* %p
+ %b = sdiv i16 %x, 42
+ %r = insertelement <8 x i16> undef, i16 %b, i32 0
+ ret <8 x i16> %r
+}
+
+define <8 x i16> @srem_op0_constant(i16* %p) nounwind {
+; ALL-LABEL: srem_op0_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movw $42, %ax
+; ALL-NEXT: xorl %edx, %edx
+; ALL-NEXT: idivw (%rdi)
+; ALL-NEXT: # kill: def $dx killed $dx def $edx
+; ALL-NEXT: movd %edx, %xmm0
+; ALL-NEXT: retq
+ %x = load i16, i16* %p
+ %b = srem i16 42, %x
+ %r = insertelement <8 x i16> undef, i16 %b, i32 0
+ ret <8 x i16> %r
+}
+
+define <4 x i32> @srem_op1_constant(i32* %p) nounwind {
+; ALL-LABEL: srem_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movslq (%rdi), %rax
+; ALL-NEXT: imulq $818089009, %rax, %rcx # imm = 0x30C30C31
+; ALL-NEXT: movq %rcx, %rdx
+; ALL-NEXT: shrq $63, %rdx
+; ALL-NEXT: sarq $35, %rcx
+; ALL-NEXT: addl %edx, %ecx
+; ALL-NEXT: imull $42, %ecx, %ecx
+; ALL-NEXT: subl %ecx, %eax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i32, i32* %p
+ %b = srem i32 %x, 42
+ %r = insertelement <4 x i32> undef, i32 %b, i32 0
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @udiv_op0_constant(i32* %p) nounwind {
+; ALL-LABEL: udiv_op0_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movl $42, %eax
+; ALL-NEXT: xorl %edx, %edx
+; ALL-NEXT: divl (%rdi)
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i32, i32* %p
+ %b = udiv i32 42, %x
+ %r = insertelement <4 x i32> undef, i32 %b, i32 0
+ ret <4 x i32> %r
+}
+
+define <2 x i64> @udiv_op1_constant(i64* %p) nounwind {
+; ALL-LABEL: udiv_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movq (%rdi), %rax
+; ALL-NEXT: shrq %rax
+; ALL-NEXT: movabsq $-4392081922311798003, %rcx # imm = 0xC30C30C30C30C30D
+; ALL-NEXT: mulq %rcx
+; ALL-NEXT: shrq $4, %rdx
+; ALL-NEXT: movq %rdx, %xmm0
+; ALL-NEXT: retq
+ %x = load i64, i64* %p
+ %b = udiv i64 %x, 42
+ %r = insertelement <2 x i64> undef, i64 %b, i32 0
+ ret <2 x i64> %r
+}
+
+define <2 x i64> @urem_op0_constant(i64* %p) nounwind {
+; ALL-LABEL: urem_op0_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movl $42, %eax
+; ALL-NEXT: xorl %edx, %edx
+; ALL-NEXT: divq (%rdi)
+; ALL-NEXT: movq %rdx, %xmm0
+; ALL-NEXT: retq
+ %x = load i64, i64* %p
+ %b = urem i64 42, %x
+ %r = insertelement <2 x i64> undef, i64 %b, i32 0
+ ret <2 x i64> %r
+}
+
+define <16 x i8> @urem_op1_constant(i8* %p) nounwind {
+; ALL-LABEL: urem_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movb (%rdi), %cl
+; ALL-NEXT: movl %ecx, %eax
+; ALL-NEXT: shrb %al
+; ALL-NEXT: movzbl %al, %eax
+; ALL-NEXT: imull $49, %eax, %eax
+; ALL-NEXT: shrl $10, %eax
+; ALL-NEXT: movb $42, %dl
+; ALL-NEXT: # kill: def $al killed $al killed $eax
+; ALL-NEXT: mulb %dl
+; ALL-NEXT: subb %al, %cl
+; ALL-NEXT: movzbl %cl, %eax
+; ALL-NEXT: movd %eax, %xmm0
+; ALL-NEXT: retq
+ %x = load i8, i8* %p
+ %b = urem i8 %x, 42
+ %r = insertelement <16 x i8> undef, i8 %b, i32 0
+ ret <16 x i8> %r
+}
+
+define <4 x float> @fadd_op1_constant(float* %p) nounwind {
+; ALL-LABEL: fadd_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; ALL-NEXT: addss {{.*}}(%rip), %xmm0
+; ALL-NEXT: retq
+ %x = load float, float* %p
+ %b = fadd float %x, 42.0
+ %r = insertelement <4 x float> undef, float %b, i32 0
+ ret <4 x float> %r
+}
+
+define <2 x double> @fsub_op1_constant(double* %p) nounwind {
+; ALL-LABEL: fsub_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; ALL-NEXT: addsd {{.*}}(%rip), %xmm0
+; ALL-NEXT: retq
+ %x = load double, double* %p
+ %b = fsub double %x, 42.0
+ %r = insertelement <2 x double> undef, double %b, i32 0
+ ret <2 x double> %r
+}
+
+define <4 x float> @fsub_op0_constant(float* %p) nounwind {
+; ALL-LABEL: fsub_op0_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; ALL-NEXT: subss (%rdi), %xmm0
+; ALL-NEXT: retq
+ %x = load float, float* %p
+ %b = fsub float 42.0, %x
+ %r = insertelement <4 x float> undef, float %b, i32 0
+ ret <4 x float> %r
+}
+
+define <4 x float> @fmul_op1_constant(float* %p) nounwind {
+; ALL-LABEL: fmul_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; ALL-NEXT: mulss {{.*}}(%rip), %xmm0
+; ALL-NEXT: retq
+ %x = load float, float* %p
+ %b = fmul float %x, 42.0
+ %r = insertelement <4 x float> undef, float %b, i32 0
+ ret <4 x float> %r
+}
+
+define <2 x double> @fdiv_op1_constant(double* %p) nounwind {
+; ALL-LABEL: fdiv_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; ALL-NEXT: divsd {{.*}}(%rip), %xmm0
+; ALL-NEXT: retq
+ %x = load double, double* %p
+ %b = fdiv double %x, 42.0
+ %r = insertelement <2 x double> undef, double %b, i32 0
+ ret <2 x double> %r
+}
+
+define <4 x float> @fdiv_op0_constant(float* %p) nounwind {
+; ALL-LABEL: fdiv_op0_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; ALL-NEXT: divss (%rdi), %xmm0
+; ALL-NEXT: retq
+ %x = load float, float* %p
+ %b = fdiv float 42.0, %x
+ %r = insertelement <4 x float> undef, float %b, i32 0
+ ret <4 x float> %r
+}
+
+define <4 x float> @frem_op1_constant(float* %p) nounwind {
+; ALL-LABEL: frem_op1_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: pushq %rax
+; ALL-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; ALL-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; ALL-NEXT: callq fmodf
+; ALL-NEXT: popq %rax
+; ALL-NEXT: retq
+ %x = load float, float* %p
+ %b = frem float %x, 42.0
+ %r = insertelement <4 x float> undef, float %b, i32 0
+ ret <4 x float> %r
+}
+
+define <2 x double> @frem_op0_constant(double* %p) nounwind {
+; ALL-LABEL: frem_op0_constant:
+; ALL: # %bb.0:
+; ALL-NEXT: pushq %rax
+; ALL-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; ALL-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; ALL-NEXT: callq fmod
+; ALL-NEXT: popq %rax
+; ALL-NEXT: retq
+ %x = load double, double* %p
+ %b = frem double 42.0, %x
+ %r = insertelement <2 x double> undef, double %b, i32 0
+ ret <2 x double> %r
+}
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