[PATCH] D50823: [VPlan] Introduce VPCmpInst sub-class in the instruction-level representation

[Hideki Saito via Phabricator via llvm-commits]

hsaito added a subscriber: lattner.
hsaito added a comment.

Jumping from https://reviews.llvm.org/D50480:

In https://reviews.llvm.org/D50480#1214790, @hsaito wrote:

> In https://reviews.llvm.org/D50480#1213673, @Ayal wrote:
>
> > This patch aims to model a rather special early-exit condition that restricts the execution of the entire loop body to certain iterations, rather than model general compare instructions. If preferred, an "`EarlyExit`" extended opcode can be introduced instead of the controversial `ICmpULE`. This should be easy to revisit in the future if needed.
>
>
> This patch is fine as is, or rather much better with ICmpULE than EarlyExit.
>
> > This patch focuses on modeling an early-exit compare and then generating it, w/o making strategic design decisions supporting future vplan-to-vplan transformations, the interfaces they may need, potential templatization, or other long-term high-level VPlan concerns. These should be explained and discussed separately along with pros and cons of alternative solutions for supporting the desired interfaces and for holding their storage, including subclassing VPInstructions, using detached Instructions, or other possibilities.
>
> Sure. I agree.
>
> [Full disclosure] I have a big mental barrier in accepting your "early-exit" terminology here since I relate that term to "break out of the loop", but that's just the terminology difference. Nothing to do with the substance of this patch. [End of full disclosure]


Regarding "using detached Instructions". I fully go against that because that'll forever prohibit moving the VPlan/VPInstructions into Analysis. IR Verifier will trigger if there is a detached IR Instruction at the end of an Analysis pass. I already had a hallway chat with @lattner about a possibility of using IR Instructions and IR CFG in the detached mode (and that also requires many utilities to be usable in detached mode) and he was totally pessimistic about it. That was two years ago at 2016 Developer Conference, but nothing really has changed since then in that regard. That was the end of my hope for using detached IR Instructions, instead of introducing VPInstructions. Detached Instructions under the hood of VPInstructions is not very useful if we can't keep them between vectorization Analysis pass and vectorization Transformation pass.


Repository:
  rL LLVM

https://reviews.llvm.org/D50823