[PATCH] D50074: [X86][AVX2] Prefer VPBLENDW+VPBLENDW+VPBLENDD to VPBLENDVB for v16i16 blend shuffles
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 27 05:41:19 PDT 2018
RKSimon updated this revision to Diff 162664.
RKSimon added a comment.
rebased - still investigating how best to start including vselect inside shuffle combining - trying to optimize for everything from SSE41 to AVX512BWVL isn't straightforward - especially as we don't do much to optimize vselect nodes most of the time as their behaviour is target specific after legalization.
TBH I reckon this could go in as it is and we improve VSELECT combines later on.
Repository:
rL LLVM
https://reviews.llvm.org/D50074
Files:
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/insertelement-ones.ll
test/CodeGen/X86/oddshuffles.ll
test/CodeGen/X86/prefer-avx256-mask-shuffle.ll
test/CodeGen/X86/vector-shuffle-256-v16.ll
test/CodeGen/X86/vector-shuffle-256-v32.ll
test/CodeGen/X86/vector-shuffle-512-v32.ll
test/CodeGen/X86/vector-shuffle-v48.ll
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