[PATCH] D51098: [AMDGPU] Add support for multi-dword s.buffer.load intrinsic

[Tim Renouf via Phabricator via llvm-commits]

tpr updated this revision to Diff 162239.
tpr added a comment.

V3: i1 glc is now i32 cachepolicy for consistency with buffer and

  tbuffer intrinsics, plus fixed formatting issue.


Repository:
  rL LLVM

https://reviews.llvm.org/D51098

Files:
  include/llvm/IR/IntrinsicsAMDGPU.td
  lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  lib/Target/AMDGPU/AMDGPUISelLowering.h
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIInstrInfo.h
  lib/Target/AMDGPU/SIInstrInfo.td
  lib/Target/AMDGPU/SMInstructions.td
  test/CodeGen/AMDGPU/smrd.ll
  test/Transforms/EarlyCSE/intrinsics.ll

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