[PATCH] D51165: [CodeGen] emit inline asm clobber list warnings for reserved (cont)
Ties Stuij via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 23 08:10:43 PDT 2018
stuij added a comment.
Unfortunately the original patch was a bit too general, in that on some architectures certain reserved registers on an asm clobber list will make sure that register isn't overridden. There's no one-to-one mapping between clobber behaviour and reserved registers.
An example of that is the PowerPC ctr register:
volatile int a[50];
int main(int ctr) {
while(ctr--) {
asm volatile(
"li 29, 0"
:
:
: "ctr"
);
a[ctr] = 1;
}
return 1; // + bar(a);
}
In this example, the use of ctr is avoided altogether, but not when it's not on the clobber list.
To avoid these kinds of false-positives, I've added a new isAsmClobberable method to TargetRegisterInfo that architectures can implement if they want to emit these asm clobber warning messages.
Repository:
rL LLVM
https://reviews.llvm.org/D51165
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