[PATCH] D46276: [CostModel][X86] Derive TTI costs from complete scheduling models (PR36550) (RFC)
Alexey Bataev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 23 07:37:28 PDT 2018
ABataev added inline comments.
================
Comment at: lib/Target/X86/X86TargetTransformInfo.cpp:698-716
+ { ISD::FADD, MVT::v8f32, 2, { X86::VADDPSYrr } },
+ { ISD::FADD, MVT::v2f64, 1, { X86::VADDPDrr } },
+ { ISD::FADD, MVT::v4f32, 1, { X86::VADDPSrr } },
+ { ISD::FADD, MVT::f64, 1, { X86::VADDSDrr } },
+ { ISD::FADD, MVT::f32, 1, { X86::VADDSSrr } },
+
+ { ISD::FSUB, MVT::v4f64, 2, { X86::VSUBPDYrr } },
----------------
andreadb wrote:
> I wonder if these cost tables could be auto-generates. For example via tablegen.
>
> ```
> class CostTableTransition<MVT, list<Instruction>, int DefaultCost = 1> {...};
> class CostTableEntry<ISDOpcode, list<CostTableTransition>> {...};
>
> def FMUL : ConstTableEntry<
> ISD::FMUL,
> [
> MVT::v4f64, [ X86::VMULPDYrr ],
> MVT::v8f32, [ X86::VMULPSYrr ],
> ...
> ]>
> >;
> ```
>
> That being said, I am not convinced that it is a good idea to do it.
> It is probably a lot of work for very little gain in return. Also, it is questionable whether tablegen descriptors would be more readable and less verbose than what you have here...
>
+1 here
Repository:
rL LLVM
https://reviews.llvm.org/D46276
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