[PATCH] D51124: [PPC64] Fix DQ-form instruction handeling and emit error for misalignment on a *_DS relocations

Rui Ueyama via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 22 16:40:51 PDT 2018


ruiu accepted this revision.
ruiu added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: ELF/Arch/PPC64.cpp:102
+// Extracts the 'PO' field of an instruction encoding.
+static uint8_t getPrimaryOpCode(uint32_t encoding) { return (encoding >> 26); }
+// Extracts the 'XO' field of a DS-form instruction encoding.
----------------
encoding -> Encoding


================
Comment at: ELF/Arch/PPC64.cpp:103
+static uint8_t getPrimaryOpCode(uint32_t encoding) { return (encoding >> 26); }
+// Extracts the 'XO' field of a DS-form instruction encoding.
+static uint8_t getDSExtendedOpCode(uint32_t encoding) { return encoding & 3; }
----------------
Add a blank line before comment.


================
Comment at: ELF/Arch/PPC64.cpp:104
+// Extracts the 'XO' field of a DS-form instruction encoding.
+static uint8_t getDSExtendedOpCode(uint32_t encoding) { return encoding & 3; }
+
----------------
This function is small and used only once. I'd inline it and remove it.


Repository:
  rLLD LLVM Linker

https://reviews.llvm.org/D51124





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