[PATCH] D51098: [AMDGPU] Add support for multi-dword s.buffer.load intrinsic

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:4492
+  MachineBasicBlock::iterator MII = Inst;
+  DebugLoc DL = Inst.getDebugLoc();
+
----------------
const reference 


================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:4533
+    // Extract the 4 32 bit sub-registers from the result to add into the final REG_SEQUENCE
+    MachineOperand NewDestOp = NewMI.getOperand(0);
+    for (unsigned i = 0 ; i < 4 ; i++)
----------------
I think value copies of MachineOperand don't behave like you would expect, so I usually avoid them


Repository:
  rL LLVM

https://reviews.llvm.org/D51098