[PATCH] D51083: [x86/SLH] Teach SLH to harden indirect branches and switches without retpolines.

[Chandler Carruth via Phabricator via llvm-commits]

chandlerc created this revision.
chandlerc added reviewers: echristo, rnk, craig.topper.
Herald added subscribers: JDevlieghere, hiraditya, mcrosier, sanjoy.

This implements the core design of tracing the intended target into the
target, checking it, and using that to update the predicate state. It
takes advantage of a few interesting aspects of SLH to make it a bit
easier to implement:

- We already split critical edges with conditional branches, so we can

assume those are gone.

- We already unfolded any memory access in the indirect branch

instruction itself.

I've left hard errors in place to catch if any of these somewhat subtle
invariants get violated.

There is some code that I can factor out and share with https://reviews.llvm.org/D50837 when it
lands, but I didn't want to couple landing the two patches, so I'll do
that in a follow-up cleanup commit if alright.

Factoring out the code to handle different scenarios of materializing an
address remains frustratingly hard. In a bunch of cases you want to fold
one of the cases into an immediate operand of some other instruction,
and you also have both symbols and basic blocks being used which require
different methods on the MI builder (and different operand kinds).
Still, I'll take a stab at sharing at least some of this code in
a follow-up if I can figure out how.


Repository:
  rL LLVM

https://reviews.llvm.org/D51083

Files:
  llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
  llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll

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