[PATCH] D50873: [WebAssembly] v128.const
Thomas Lively via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 20 16:36:04 PDT 2018
tlively marked 2 inline comments as done.
tlively added inline comments.
================
Comment at: lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp:184
}
+ // Vector lane operands (not LEB encoded).
+ case WebAssembly::OPERAND_VEC_I8IMM: {
----------------
aheejin wrote:
> Are these added in order to prevent elements from being LEB-encoded one by one? SIMD immediates do not use LEB encoding?
That's correct. The spec says that the vector immediate is actually an array of 16 immediate bytes, i.e. not LEB-encoded. However, ISEL wants to treat v16i8, v8i16, v4i32, etc. all separately rather than converting them all to v16i8 first, so we need these new operand types in order to encode the larger lane values without LEB.
Repository:
rL LLVM
https://reviews.llvm.org/D50873
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