[PATCH] D50982: [AMDGPU] Legalize VGPR Rsrc operands for MUBUF instructions

Scott Linder via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 20 11:12:18 PDT 2018


scott.linder created this revision.
scott.linder added a reviewer: arsenm.
Herald added subscribers: llvm-commits, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.

Emit a waterfall loop in the general case for a potentially-divergent Rsrc operand. When possible, avoid this by using Addr64 instructions.

The old legalization assumed Addr64 was available, and only handled the _ADDR64 and _OFFSET variants of MUBUF instructions.

I am not sure what the best way to identify Addr64 MUBUF opcodes is, but since we need the InstrMapping in order to convert _OFFSET to _ADDR64 anyway I tried to reuse that mapping.


Repository:
  rL LLVM

https://reviews.llvm.org/D50982

Files:
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIInstrInfo.h
  lib/Target/AMDGPU/SIInstrInfo.td
  test/CodeGen/AMDGPU/mubuf-legalize-operands.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D50982.161517.patch
Type: text/x-patch
Size: 27516 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180820/07fb63da/attachment.bin>


More information about the llvm-commits mailing list