[PATCH] D50964: [Sparc] Use ANDN instead of AND if constant can be encoded more efficiently
Daniel Cederman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 20 03:43:08 PDT 2018
dcederman created this revision.
dcederman added reviewers: jyknight, venkatra.
Herald added subscribers: llvm-commits, jrtc27, fedor.sergeev.
In the case of (and reg, constant) or (or reg, constant), it can be beneficial to use a ANDNrr/ORNrr instruction instead of ANDrr/ORrr, if the complement of the constant can be encoded using a single SETHI instruction instead of a SETHI/ORri pair.
If the constant has more than one use, it is probably better to keep it in its original form.
Repository:
rL LLVM
https://reviews.llvm.org/D50964
Files:
lib/Target/Sparc/SparcInstrInfo.td
test/CodeGen/SPARC/sethiandn.ll
Index: test/CodeGen/SPARC/sethiandn.ll
===================================================================
--- /dev/null
+++ test/CodeGen/SPARC/sethiandn.ll
@@ -0,0 +1,42 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=sparc | FileCheck %s -check-prefix=SPARC
+
+define i32 @test_andn(i32 %x) nounwind {
+; SPARC-LABEL: test_andn:
+; SPARC: ! %bb.0: ! %entry
+; SPARC-NEXT: sethi 4194272, %o1
+; SPARC-NEXT: retl
+; SPARC-NEXT: andn %o0, %o1, %o0
+entry:
+ %and = and i32 %x, 32767
+ ret i32 %and
+}
+
+define i32 @test_orn(i32 %x) nounwind {
+; SPARC-LABEL: test_orn:
+; SPARC: ! %bb.0: ! %entry
+; SPARC-NEXT: sethi 4194272, %o1
+; SPARC-NEXT: retl
+; SPARC-NEXT: orn %o0, %o1, %o0
+entry:
+ %or = or i32 %x, 32767
+ ret i32 %or
+}
+
+; If constant is used more than once it is probably
+; better to keep it in its original form.
+define i32 @test_used_more_than_once(i32 %x) nounwind {
+; SPARC-LABEL: test_used_more_than_once:
+; SPARC: ! %bb.0: ! %entry
+; SPARC-NEXT: sethi 31, %o1
+; SPARC-NEXT: or %o1, 1023, %o1
+; SPARC-NEXT: or %o0, %o1, %o2
+; SPARC-NEXT: and %o0, %o1, %o0
+; SPARC-NEXT: retl
+; SPARC-NEXT: xor %o2, %o0, %o0
+entry:
+ %0 = or i32 %x, 32767
+ %and = and i32 %x, 32767
+ %res = xor i32 %0, %and
+ ret i32 %res
+}
Index: lib/Target/Sparc/SparcInstrInfo.td
===================================================================
--- lib/Target/Sparc/SparcInstrInfo.td
+++ lib/Target/Sparc/SparcInstrInfo.td
@@ -89,10 +89,20 @@
MVT::i32);
}]>;
+// Return the complement of a HI22 immediate value.
+def HI22_not : SDNodeXForm<imm, [{
+ return CurDAG->getTargetConstant(~(unsigned)N->getZExtValue() >> 10, SDLoc(N),
+ MVT::i32);
+}]>;
+
def SETHIimm : PatLeaf<(imm), [{
return isShiftedUInt<22, 10>(N->getZExtValue());
}], HI22>;
+def SETHIimm_not : PatLeaf<(i32 imm), [{
+ return N->hasOneUse() && isShiftedUInt<22, 10>(~(unsigned)N->getZExtValue());
+}], HI22_not>;
+
// Addressing modes.
def ADDRrr : ComplexPattern<iPTR, 2, "SelectADDRrr", [], []>;
def ADDRri : ComplexPattern<iPTR, 2, "SelectADDRri", [frameindex], []>;
@@ -680,6 +690,12 @@
(outs IntRegs:$rd), (ins IntRegs:$rs1, simm13Op:$simm13),
"xnor $rs1, $simm13, $rd", []>;
+def : Pat<(and IntRegs:$rs1, SETHIimm_not:$rs2),
+ (ANDNrr i32:$rs1, (SETHIi SETHIimm_not:$rs2))>;
+
+def : Pat<(or IntRegs:$rs1, SETHIimm_not:$rs2),
+ (ORNrr i32:$rs1, (SETHIi SETHIimm_not:$rs2))>;
+
let Defs = [ICC] in {
defm ANDCC : F3_12np<"andcc", 0b010001>;
defm ANDNCC : F3_12np<"andncc", 0b010101>;
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