[PATCH] D50857: llvm: Add support MIPS r6 Debian triples
YunQiang Su via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 19 05:53:06 PDT 2018
wzssyqa updated this revision to Diff 161395.
wzssyqa added a comment.
Drop the modification by git-clang-format
Repository:
rL LLVM
https://reviews.llvm.org/D50857
Files:
include/llvm/ADT/Triple.h
lib/Support/Triple.cpp
Index: lib/Support/Triple.cpp
===================================================================
--- lib/Support/Triple.cpp
+++ lib/Support/Triple.cpp
@@ -398,10 +398,14 @@
.Case("thumbeb", Triple::thumbeb)
.Case("avr", Triple::avr)
.Case("msp430", Triple::msp430)
- .Cases("mips", "mipseb", "mipsallegrex", Triple::mips)
- .Cases("mipsel", "mipsallegrexel", Triple::mipsel)
- .Cases("mips64", "mips64eb", Triple::mips64)
- .Case("mips64el", Triple::mips64el)
+ .Cases("mips", "mipseb", "mipsallegrex", "mipsisa32r6",
+ "mipsr6", Triple::mips)
+ .Cases("mipsel", "mipsallegrexel", "mipsisa32r6el", "mipsr6el",
+ Triple::mipsel)
+ .Cases("mips64", "mips64eb", "mipsn32", "mipsisa64r6",
+ "mips64r6", "mipsn32r6", Triple::mips64)
+ .Cases("mips64el", "mipsn32el", "mipsisa64r6el", "mips64r6el",
+ "mipsn32r6el", Triple::mips64el)
.Case("nios2", Triple::nios2)
.Case("r600", Triple::r600)
.Case("amdgcn", Triple::amdgcn)
@@ -538,6 +542,12 @@
}
static Triple::SubArchType parseSubArch(StringRef SubArchName) {
+ if (SubArchName.startswith("mipsisa32r6") ||
+ SubArchName.startswith("mipsisa64r6") ||
+ (SubArchName.startswith("mips") &&
+ (SubArchName.endswith("r6el") || SubArchName.endswith("r6"))))
+ return Triple::MipsSubArch_r6;
+
StringRef ARMSubArch = ARM::getCanonicalArchName(SubArchName);
// For now, this is the small part. Early return.
@@ -709,6 +719,12 @@
ObjectFormat = parseFormat(Components[3]);
}
}
+ } else {
+ Environment = StringSwitch<Triple::EnvironmentType>(Components[0])
+ .StartsWith("mipsn32", Triple::GNUABIN32)
+ .StartsWith("mips64", Triple::GNUABI64)
+ .StartsWith("mipsisa64", Triple::GNUABI64)
+ .Default(UnknownEnvironment);
}
}
if (ObjectFormat == UnknownObjectFormat)
Index: include/llvm/ADT/Triple.h
===================================================================
--- include/llvm/ADT/Triple.h
+++ include/llvm/ADT/Triple.h
@@ -55,10 +55,10 @@
bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)
bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)
hexagon, // Hexagon: hexagon
- mips, // MIPS: mips, mipsallegrex
- mipsel, // MIPSEL: mipsel, mipsallegrexel
- mips64, // MIPS64: mips64
- mips64el, // MIPS64EL: mips64el
+ mips, // MIPS: mips, mipsallegrex, mipsr6
+ mipsel, // MIPSEL: mipsel, mipsallegrexe, mipsr6el
+ mips64, // MIPS64: mips64, mips64r6, mipsn32, mipsn32r6
+ mips64el, // MIPS64EL: mips64el, mips64r6el, mipsn32el, mipsn32r6el
msp430, // MSP430: msp430
nios2, // NIOSII: nios2
ppc, // PPC: powerpc
@@ -72,8 +72,8 @@
sparcv9, // Sparcv9: Sparcv9
sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant
systemz, // SystemZ: s390x
- tce, // TCE (http://tce.cs.tut.fi/): tce
- tcele, // TCE little endian (http://tce.cs.tut.fi/): tcele
+ tce, // TCE (http: //tce.cs.tut.fi/): tce
+ tcele, // TCE little endian (http: //tce.cs.tut.fi/): tcele
thumb, // Thumb (little endian): thumb, thumbv.*
thumbeb, // Thumb (big endian): thumbeb
x86, // X86: i[3-9]86
@@ -125,7 +125,9 @@
KalimbaSubArch_v3,
KalimbaSubArch_v4,
- KalimbaSubArch_v5
+ KalimbaSubArch_v5,
+
+ MipsSubArch_r6
};
enum VendorType {
UnknownVendor,
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