[llvm] r340118 - Add the extended XMM registers mappings for AVX-512.

[Zachary Turner via llvm-commits]

Author: zturner
Date: Fri Aug 17 20:54:16 2018
New Revision: 340118

URL: http://llvm.org/viewvc/llvm-project?rev=340118&view=rev
Log:
Add the extended XMM registers mappings for AVX-512.

After this we should have the entire AVX-512 register set
mapping in place.

Modified:
    llvm/trunk/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def
    llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp

Modified: llvm/trunk/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def?rev=340118&r1=340117&r2=340118&view=diff
==============================================================================
--- llvm/trunk/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def (original)
+++ llvm/trunk/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def Fri Aug 17 20:54:16 2018
@@ -276,6 +276,23 @@ CV_REGISTER(AMD64_YMM13, 381)
 CV_REGISTER(AMD64_YMM14, 382)
 CV_REGISTER(AMD64_YMM15, 383)
 
+CV_REGISTER(AMD64_XMM16, 694)
+CV_REGISTER(AMD64_XMM17, 695)
+CV_REGISTER(AMD64_XMM18, 696)
+CV_REGISTER(AMD64_XMM19, 697)
+CV_REGISTER(AMD64_XMM20, 698)
+CV_REGISTER(AMD64_XMM21, 699)
+CV_REGISTER(AMD64_XMM22, 700)
+CV_REGISTER(AMD64_XMM23, 701)
+CV_REGISTER(AMD64_XMM24, 702)
+CV_REGISTER(AMD64_XMM25, 703)
+CV_REGISTER(AMD64_XMM26, 704)
+CV_REGISTER(AMD64_XMM27, 705)
+CV_REGISTER(AMD64_XMM28, 706)
+CV_REGISTER(AMD64_XMM29, 707)
+CV_REGISTER(AMD64_XMM30, 708)
+CV_REGISTER(AMD64_XMM31, 709)
+
 CV_REGISTER(AMD64_YMM16, 710)
 CV_REGISTER(AMD64_YMM17, 711)
 CV_REGISTER(AMD64_YMM18, 712)

Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp?rev=340118&r1=340117&r2=340118&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp Fri Aug 17 20:54:16 2018
@@ -251,6 +251,23 @@ void X86_MC::initLLVMToSEHAndCVRegMappin
       {codeview::RegisterId::AMD64_K5, X86::K5},
       {codeview::RegisterId::AMD64_K6, X86::K6},
       {codeview::RegisterId::AMD64_K7, X86::K7},
+      {codeview::RegisterId::AMD64_XMM16, X86::XMM16},
+      {codeview::RegisterId::AMD64_XMM17, X86::XMM17},
+      {codeview::RegisterId::AMD64_XMM18, X86::XMM18},
+      {codeview::RegisterId::AMD64_XMM19, X86::XMM19},
+      {codeview::RegisterId::AMD64_XMM20, X86::XMM20},
+      {codeview::RegisterId::AMD64_XMM21, X86::XMM21},
+      {codeview::RegisterId::AMD64_XMM22, X86::XMM22},
+      {codeview::RegisterId::AMD64_XMM23, X86::XMM23},
+      {codeview::RegisterId::AMD64_XMM24, X86::XMM24},
+      {codeview::RegisterId::AMD64_XMM25, X86::XMM25},
+      {codeview::RegisterId::AMD64_XMM26, X86::XMM26},
+      {codeview::RegisterId::AMD64_XMM27, X86::XMM27},
+      {codeview::RegisterId::AMD64_XMM28, X86::XMM28},
+      {codeview::RegisterId::AMD64_XMM29, X86::XMM29},
+      {codeview::RegisterId::AMD64_XMM30, X86::XMM30},
+      {codeview::RegisterId::AMD64_XMM31, X86::XMM31},
+
   };
   for (unsigned I = 0; I < array_lengthof(RegMap); ++I)
     MRI->mapLLVMRegToCVReg(RegMap[I].Reg, static_cast<int>(RegMap[I].CVReg));