[PATCH] D50885: [AArch64][SVE] Asm: Add SVE System registers
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 17 01:52:40 PDT 2018
sdesmalen created this revision.
sdesmalen added reviewers: SjoerdMeijer, samparker, pbarrio, fhahn.
Herald added a reviewer: javed.absar.
Herald added subscribers: rkruppe, kristof.beyls, tschuett.
This patch adds system registers for controlling aspects of SVE:
- ZCR_EL1 (r/w) visible at EL1 and EL0.
- ZCR_EL2 (r/w) visible at EL2 and Non-secure EL1 and EL0.
- ZCR_EL3 (r/w) visible at all exception levels.
and a system register identifying SVE:
- ID_AA64ZFR0_EL1 (r) SVE Feature identifier.
https://reviews.llvm.org/D50885
Files:
lib/Target/AArch64/AArch64SystemOperands.td
test/MC/AArch64/arm64-system-encoding.s
test/MC/AArch64/basic-a64-diagnostics.s
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