[PATCH] D50784: [TableGen] Add Instruction custom byte sequence emission

[Artyom Goncharov via Phabricator via llvm-commits]

m4yers created this revision.
Herald added subscribers: llvm-commits, mgorny.

This patch is part of a bigger one https://reviews.llvm.org/D50314. It adds a possibility to emit a
custom sequence of bytes attributed to an Instruction.

This feature can be used to simplify CISC machine code emission as it done in
M68K https://reviews.llvm.org/D50314 patch. You can check out M680x0InstrFormats.td, M680x0InstrArithmetic.td and
M680x0MCCodeEmitter.cpp to see how it is used. In short, the process is
like this:

- Define a set of parameterized "beads" of length `8`. The composition and meaning of those bits is up to the concrete backend. In m68k case first `4` bits is the type, the last `4` bits is the payload.
- Every non-pseudo instruction receives a number of those beads and stores them into `Beads` Instruction variable.
- The beads are read by this tablegen generator to emit an array of those beads referenced by instruction opcode.
- The MCCodeEmitter interprets the beads of a concrete instruction to emit a machine command. In m68k case type is read to interpret the payload, which can be a reference to an operand, an immediate value or a complex pattern.


Repository:
  rL LLVM

https://reviews.llvm.org/D50784

Files:
  utils/TableGen/CMakeLists.txt
  utils/TableGen/CodeBeadsGen.cpp
  utils/TableGen/TableGen.cpp
  utils/TableGen/TableGenBackends.h

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