[PATCH] D50392: [TargetLowering] Add support for non-uniform vectors to BuildExactSDIV

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 14 13:24:28 PDT 2018


craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: test/CodeGen/X86/sdiv-exact.ll:2
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64
----------------
RKSimon wrote:
> craig.topper wrote:
> > Why are the features flags between 32-bit and 64-bit mismatched? This results in making 64-bit look way better than 32-bit in the modified test cases. For example test5 where 64-bit is one instruction.
> Laziness mainly - I didn't see much gain from SSE2/AVX2 codegen tests for both 32/64 - its easy enough to add if you think its useful?
I agree there's probably not much value. I just had to go up here to figure out why 64-bit looked so much better.


Repository:
  rL LLVM

https://reviews.llvm.org/D50392





More information about the llvm-commits mailing list