[PATCH] D50496: [RISCV] Implment pseudo instructions for load/store from a symbol address.
Roger Ferrer Ibanez via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 14 01:43:27 PDT 2018
rogfer01 added a comment.
Thanks for the update @kito-cheng . Some more comments inline as the change is propagating a mistake of mine I introduced in https://reviews.llvm.org/rL339314 (fixed in https://reviews.llvm.org/rL339654).
You may have to rebase the patch. Apologies.
================
Comment at: lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1264
MCInst &AUIPC =
+ MCInstBuilder(RISCV::AUIPC).addOperand(TmpReg).addExpr(SymbolExpr);
----------------
This introduces the same bug I introduced in my earlier patch (fixed in rL339654). The easiest way to avoid it is to use `MCInstBuilder` as an argument of a function call.
================
Comment at: lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1289
+
MCInst &ADDI = MCInstBuilder(RISCV::ADDI)
.addOperand(DestReg)
----------------
Ditto.
================
Comment at: lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1326
+
+ MCInst &LOAD = MCInstBuilder(Opcode)
+ .addOperand(DestReg)
----------------
Ditto.
================
Comment at: lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1361
+
+ MCInst &STORE = MCInstBuilder(Opcode)
+ .addOperand(DestReg)
----------------
Ditto.
https://reviews.llvm.org/D50496
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