[llvm] r339619 - [NFC][InstCombine] Add a test for D50465 that used to assert

[Roman Lebedev via llvm-commits]

Author: lebedevri
Date: Mon Aug 13 14:49:33 2018
New Revision: 339619

URL: http://llvm.org/viewvc/llvm-project?rev=339619&view=rev
Log:
[NFC][InstCombine] Add a test for D50465 that used to assert

This is valid to fold, too.
https://rise4fun.com/Alive/0lz

Modified:
    llvm/trunk/test/Transforms/InstCombine/signed-truncation-check.ll

Modified: llvm/trunk/test/Transforms/InstCombine/signed-truncation-check.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/signed-truncation-check.ll?rev=339619&r1=339618&r2=339619&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/signed-truncation-check.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/signed-truncation-check.ll Mon Aug 13 14:49:33 2018
@@ -101,6 +101,25 @@ define i1 @positive_with_aggressive_icmp
 
 ; I'm sure there is a bunch more patterns possible :/
 
+; This used to trigger an assert, because the icmp's are not direct
+; operands of the and.
+define i1 @positive_with_extra_and(i32 %arg, i1 %z) {
+; CHECK-LABEL: @positive_with_extra_and(
+; CHECK-NEXT:    [[T1:%.*]] = icmp sgt i32 [[ARG:%.*]], -1
+; CHECK-NEXT:    [[T2:%.*]] = add i32 [[ARG]], 128
+; CHECK-NEXT:    [[T3:%.*]] = icmp ult i32 [[T2]], 256
+; CHECK-NEXT:    [[T4:%.*]] = and i1 [[T1]], [[Z:%.*]]
+; CHECK-NEXT:    [[T5:%.*]] = and i1 [[T3]], [[T4]]
+; CHECK-NEXT:    ret i1 [[T5]]
+;
+  %t1 = icmp sgt i32 %arg, -1
+  %t2 = add i32 %arg, 128
+  %t3 = icmp ult i32 %t2, 256
+  %t4 = and i1 %t1, %z
+  %t5 = and i1 %t3, %t4
+  ret i1 %t5
+}
+
 ; ============================================================================ ;
 ; Vector tests
 ; ============================================================================ ;