[PATCH] D50636: [DAGCombiner] Add X / X -> 1 & X % X -> 0 folds.

Mon Aug 13 07:20:43 PDT 2018

RKSimon created this revision.
RKSimon added reviewers: jonpa, pftbest, craig.topper, spatel, efriedma.

Adds more divrem folds to try and get in sync with InstructionSimplify

This hits a number of reduced tests so I've had to tweak them; through a mixture of visual scrutiny and debugging they seem to be hitting the same points as the original test failed at.

Repository:
  rL LLVM

https://reviews.llvm.org/D50636

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/MSP430/libcalls.ll
  test/CodeGen/SystemZ/pr32372.ll
  test/CodeGen/X86/2006-11-17-IllegalMove.ll
  test/CodeGen/X86/combine-sdiv.ll
  test/CodeGen/X86/combine-srem.ll
  test/CodeGen/X86/combine-udiv.ll
  test/CodeGen/X86/combine-urem.ll
  test/CodeGen/X86/known-bits.ll

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