[PATCH] D49698: [PowerPC] Generate lxsd instead of the ld->mtvsrd sequence for vector loads

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added inline comments.


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Comment at: llvm/test/CodeGen/PowerPC/pre-inc-disable.ll:11
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+; CHECK-NOT: i64,i64,ch = load<(load 8 from {{.*}}), <pre-inc>>
+
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I don't think this is a meaningful test since the corresponding RUN line doesn't include something like `-debug-only=isel`.


https://reviews.llvm.org/D49698