[PATCH] D50633: [AMDGPU] Add new Mode Register pass

[Tim Corringham via Phabricator via llvm-commits]

timcorringham created this revision.
Herald added subscribers: llvm-commits, t-tye, tpr, dstuttard, yaxunl, mgorny, nhaehnle, wdng, kzhuravl, arsenm.

A new pass to manage the Mode register.

Currently this just looks at the floating point double precision
rounding requirements, but is intended to be easily extended to
encompass all Mode register settings.

The floating point double precision rounding mode is required by
the 16 bit interpolation instructions.


Repository:
  rL LLVM

https://reviews.llvm.org/D50633

Files:
  lib/Target/AMDGPU/AMDGPU.h
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  lib/Target/AMDGPU/CMakeLists.txt
  lib/Target/AMDGPU/SIDefines.h
  lib/Target/AMDGPU/SIInstrFormats.td
  lib/Target/AMDGPU/SIInstrInfo.h
  lib/Target/AMDGPU/SIModeRegister.cpp
  lib/Target/AMDGPU/VOP1Instructions.td
  lib/Target/AMDGPU/VOP3Instructions.td
  test/CodeGen/AMDGPU/mode-register.mir

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