[llvm] r339509 - [TargetLowering] Simplify one of the special cases in SimplifyDemandedBits for XOR. NFCI
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat Aug 11 23:52:03 PDT 2018
Author: ctopper
Date: Sat Aug 11 23:52:03 2018
New Revision: 339509
URL: http://llvm.org/viewvc/llvm-project?rev=339509&view=rev
Log:
[TargetLowering] Simplify one of the special cases in SimplifyDemandedBits for XOR. NFCI
We were checking for all bits being Known by checking Known.Zero|Known.One, but if all the bits are known then the value should be a Constant and we can just check for that instead.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=339509&r1=339508&r2=339509&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Sat Aug 11 23:52:03 2018
@@ -690,32 +690,32 @@ bool TargetLowering::SimplifyDemandedBit
// Output known-1 are known to be set if set in only one of the LHS, RHS.
KnownOut.One = (Known.Zero & Known2.One) | (Known.One & Known2.Zero);
- // If all of the demanded bits on one side are known, and all of the set
- // bits on that side are also known to be set on the other side, turn this
- // into an AND, as we know the bits will be cleared.
- // e.g. (X | C1) ^ C2 --> (X | C1) & ~C2 iff (C1&C2) == C2
- // NB: it is okay if more bits are known than are requested
- if (NewMask.isSubsetOf(Known.Zero|Known.One)) { // all known on one side
- if (Known.One == Known2.One) { // set bits are the same on both sides
- SDValue ANDC = TLO.DAG.getConstant(~Known.One & NewMask, dl, VT);
+ if (ConstantSDNode *C = isConstOrConstSplat(Op.getOperand(1))) {
+ // If one side is a constant, and all of the known set bits on the other
+ // side are also set in the constant, turn this into an AND, as we know
+ // the bits will be cleared.
+ // e.g. (X | C1) ^ C2 --> (X | C1) & ~C2 iff (C1&C2) == C2
+ // NB: it is okay if more bits are known than are requested
+ if (C->getAPIntValue() == Known2.One) {
+ SDValue ANDC = TLO.DAG.getConstant(~C->getAPIntValue() & NewMask,
+ dl, VT);
return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::AND, dl, VT,
Op.getOperand(0), ANDC));
}
- }
- // If the RHS is a constant, see if we can change it. Don't alter a -1
- // constant because that's a 'not' op, and that is better for combining and
- // codegen.
- ConstantSDNode *C = isConstOrConstSplat(Op.getOperand(1));
- if (C && !C->isAllOnesValue()) {
- if (NewMask.isSubsetOf(C->getAPIntValue())) {
- // We're flipping all demanded bits. Flip the undemanded bits too.
- SDValue New = TLO.DAG.getNOT(dl, Op.getOperand(0), VT);
- return TLO.CombineTo(Op, New);
+ // If the RHS is a constant, see if we can change it. Don't alter a -1
+ // constant because that's a 'not' op, and that is better for combining
+ // and codegen.
+ if (!C->isAllOnesValue()) {
+ if (NewMask.isSubsetOf(C->getAPIntValue())) {
+ // We're flipping all demanded bits. Flip the undemanded bits too.
+ SDValue New = TLO.DAG.getNOT(dl, Op.getOperand(0), VT);
+ return TLO.CombineTo(Op, New);
+ }
+ // If we can't turn this into a 'not', try to shrink the constant.
+ if (ShrinkDemandedConstant(Op, NewMask, TLO))
+ return true;
}
- // If we can't turn this into a 'not', try to shrink the constant.
- if (ShrinkDemandedConstant(Op, NewMask, TLO))
- return true;
}
Known = std::move(KnownOut);
More information about the llvm-commits
mailing list