[lld] r339477 - [ELF][HEXAGON] Add R_HEX_8_X relocation

Sid Manning via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 10 14:48:41 PDT 2018


Author: sidneym
Date: Fri Aug 10 14:48:40 2018
New Revision: 339477

URL: http://llvm.org/viewvc/llvm-project?rev=339477&view=rev
Log:
[ELF][HEXAGON] Add R_HEX_8_X relocation

Differential Revision: https://reviews.llvm.org/D50577

Modified:
    lld/trunk/ELF/Arch/Hexagon.cpp
    lld/trunk/test/ELF/hexagon.s

Modified: lld/trunk/ELF/Arch/Hexagon.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/Hexagon.cpp?rev=339477&r1=339476&r2=339477&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/Hexagon.cpp (original)
+++ lld/trunk/ELF/Arch/Hexagon.cpp Fri Aug 10 14:48:40 2018
@@ -104,6 +104,14 @@ static uint32_t findMaskR6(uint32_t Insn
   return 0;
 }
 
+static uint32_t findMaskR8(uint32_t Insn) {
+  if ((0xff000000 & Insn) == 0xde000000)
+    return 0x00e020e8;
+  if ((0xff000000 & Insn) == 0x3c000000)
+    return 0x0000207f;
+  return 0x00001fe0;
+}
+
 static void or32le(uint8_t *P, int32_t V) { write32le(P, read32le(P) | V); }
 
 void Hexagon::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
@@ -114,6 +122,9 @@ void Hexagon::relocateOne(uint8_t *Loc,
   case R_HEX_6_X:
     or32le(Loc, applyMask(findMaskR6(read32le(Loc)), Val));
     break;
+  case R_HEX_8_X:
+    or32le(Loc, applyMask(findMaskR8(read32le(Loc)), Val));
+    break;
   case R_HEX_12_X:
     or32le(Loc, applyMask(0x000007e0, Val));
     break;

Modified: lld/trunk/test/ELF/hexagon.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/hexagon.s?rev=339477&r1=339476&r2=339477&view=diff
==============================================================================
--- lld/trunk/test/ELF/hexagon.s (original)
+++ lld/trunk/test/ELF/hexagon.s Fri Aug 10 14:48:40 2018
@@ -159,3 +159,16 @@ r0.h = #HI(_start)
 # R_HEX_LO16
 r0.l = #LO(_start)
 # CHECK: r0.l = #4096
+
+# R_HEX_8_X has 3 relocation mask variations
+#0xde000000
+r0=sub(##_start,asl(r1,#4))
+# CHECK: de00c406   	r0 = sub(##69632,asl(r0,#4)) }
+
+#0x3c000000
+memw(r0+#0) = ##_start
+# CHECK: 3c40c000   	memw(r0+#0) = ##69632 }
+
+# The rest:
+r1:0=combine(r2,##_start);
+# CHECK: 7302e000   	r1:0 = combine(r2,##69632) }




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