[PATCH] D50391: [NVPTX] Select atomic loads and stores
Artem Belevich via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 8 10:41:43 PDT 2018
tra accepted this revision.
tra added a comment.
This revision is now accepted and ready to land.
In general .relaxed.sys semantics does appear to match guarantees provided by llvm's monotonic ordering, so the patch overall looks like the right thing to do.
================
Comment at: lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp:853
+ // .acquire was only added with PTX ISA 6.0 / sm_70.
+ AtomicOrdering Ordering = LD->getOrdering();
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I'd be more explicit -- `in order to lower atomic loads with stronger guarantees we would need to have to use .release/.acquire which are only available in ...`.
Same for the tryStore() below.
Maybe add TODO to check if we *are* compiling for sm_70 and use ld/st with .release/.acquire qualifiers then.
Repository:
rL LLVM
https://reviews.llvm.org/D50391
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