[PATCH] D50272: [tablegen] Improve performance of -gen-register-info by replacing barely-necessary std::map with a sorted vector

[Daniel Sanders via Phabricator via llvm-commits]

dsanders added a comment.

In https://reviews.llvm.org/D50272#1191922, @RKSimon wrote:

> @dsanders I'm curious how you noticed this particular case - were you just going through perf traces, noticed the hit and manually worked out how the map was being poorly used?


Pretty much. Our build bottlenecks on some of the tablegen passes and every so often I take a look at them in Instruments and see if I can spot anything in the trace that ought to be looked into. The Time Profiler is useful for this but it's not very good at pinpointing a problem because it's a statistical profiler (High Frequency mode makes a big difference though). I found this one through the Allocation Density graph on the Allocations track. There was a long spike in allocations that wasn't coupled with an increase in memory usage. I selected that region in the timeline and looked at the detailed graphs and found that the allocations were mostly the same size. I then looked at the allocations for that size and found they all came from inserting into the map.

In the traces I'm looking at normalizeWeight() in CodeGenRegisters.cpp is by far the dominating factor in terms of time but there doesn't seem to be any simple improvements. I need to look into the details of what it's doing and how but looking at it from a high level, the main observation I have is that there's generally only a few register/sub-register topologies even if there are lots of registers. If we can calculate the weights for those topologies and then apply them to the relevant registers then that should be a significant saving.

> My guess is that there might be more cases like this where the choice of data structure wasn't optimal and I'm starting to wonder if there are ways we could instrument them all to identify usage patterns etc.

That's an interesting idea. We may be able to make a custom instrument that can reveal phased usage (https://developer.apple.com/videos/play/wwdc2018/410/)


Repository:
  rL LLVM

https://reviews.llvm.org/D50272