[llvm] r339231 - [X86][SSE] Add divide-by-one exact sdiv vector test

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 8 03:16:43 PDT 2018


Author: rksimon
Date: Wed Aug  8 03:16:43 2018
New Revision: 339231

URL: http://llvm.org/viewvc/llvm-project?rev=339231&view=rev
Log:
[X86][SSE] Add divide-by-one exact sdiv vector test

Based on PR38477, we need to ensure we're testing for divide-by-one in non-uniform vectors

Modified:
    llvm/trunk/test/CodeGen/X86/sdiv-exact.ll

Modified: llvm/trunk/test/CodeGen/X86/sdiv-exact.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sdiv-exact.ll?rev=339231&r1=339230&r2=339231&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sdiv-exact.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sdiv-exact.ll Wed Aug  8 03:16:43 2018
@@ -217,3 +217,37 @@ define <4 x i32> @test7(<4 x i32> %x) {
   %div = sdiv exact <4 x i32> %x, <i32 25, i32 25, i32 27, i32 27>
   ret <4 x i32> %div
 }
+
+define <4 x i32> @test8(<4 x i32> %x) {
+; X86-LABEL: test8:
+; X86:       # %bb.0:
+; X86-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
+; X86-NEXT:    movd %xmm1, %eax
+; X86-NEXT:    sarl $3, %eax
+; X86-NEXT:    imull $-1431655765, %eax, %eax # imm = 0xAAAAAAAB
+; X86-NEXT:    movd %eax, %xmm1
+; X86-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
+; X86-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[3,1,2,3]
+; X86-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
+; X86-NEXT:    movd %xmm2, %eax
+; X86-NEXT:    sarl $3, %eax
+; X86-NEXT:    imull $-1431655765, %eax, %eax # imm = 0xAAAAAAAB
+; X86-NEXT:    movd %eax, %xmm1
+; X86-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
+; X86-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
+; X86-NEXT:    retl
+;
+; X64-LABEL: test8:
+; X64:       # %bb.0:
+; X64-NEXT:    vpextrd $2, %xmm0, %eax
+; X64-NEXT:    sarl $3, %eax
+; X64-NEXT:    imull $-1431655765, %eax, %eax # imm = 0xAAAAAAAB
+; X64-NEXT:    vpinsrd $2, %eax, %xmm0, %xmm1
+; X64-NEXT:    vpextrd $3, %xmm0, %eax
+; X64-NEXT:    sarl $3, %eax
+; X64-NEXT:    imull $-1431655765, %eax, %eax # imm = 0xAAAAAAAB
+; X64-NEXT:    vpinsrd $3, %eax, %xmm1, %xmm0
+; X64-NEXT:    retq
+  %div = sdiv exact <4 x i32> %x, <i32 1, i32 1, i32 24, i32 24>
+  ret <4 x i32> %div
+}




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