[PATCH] D50236: [ARM] FP16: support VACGT

Sjoerd Meijer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 7 08:00:12 PDT 2018


SjoerdMeijer added inline comments.


================
Comment at: test/CodeGen/ARM/armv8.2a-fp16-vector-intrinsics.ll:525
 
-; FIXME (PR38404)
-;
-;define dso_local <4 x i16> @test_vcagt_f16(<4 x half> %a, <4 x half> %b) {
-;entry:
-;  %vcagt_v2.i = tail call <4 x i16> @llvm.arm.neon.vacgt.v4i16.v4f16(<4 x half> %a, <4 x half> %b)
-;  ret <4 x i16> %vcagt_v2.i
-;}
-;
-;define dso_local <8 x i16> @test_vcagtq_f16(<8 x half> %a, <8 x half> %b) {
-;entry:
-;  %vcagtq_v2.i = tail call <8 x i16> @llvm.arm.neon.vacgt.v8i16.v8f16(<8 x half> %a, <8 x half> %b)
-;  ret <8 x i16> %vcagtq_v2.i
-;}
+define dso_local <4 x i16> @test_vcagt_f16(<4 x half> %a, <4 x half> %b) {
+; CHECK-LABEL: test_vcagt_f16:
----------------
SjoerdMeijer wrote:
> olista01 wrote:
> > The test is "vcagt", but the intrincic/instruction is "vacgt".
> Thanks, I will fix the typo before committing.
Mmmm.... it's not a typo: the reason is because the ACLE intrinsic is called "vcagt". I will therefore keep it as it is...


================
Comment at: test/CodeGen/ARM/armv8.2a-fp16-vector-intrinsics.ll:561
 
-; FIXME (PR38404)
-;
-;define dso_local <4 x i16> @test_vcalt_f16(<4 x half> %a, <4 x half> %b) {
-;entry:
-;  %vcalt_v2.i = tail call <4 x i16> @llvm.arm.neon.vacgt.v4i16.v4f16(<4 x half> %b, <4 x half> %a)
-;  ret <4 x i16> %vcalt_v2.i
-;}
+define dso_local <4 x i16> @test_vcalt_f16(<4 x half> %a, <4 x half> %b) {
+; CHECK-LABEL: test_vcalt_f16:
----------------
But will remove this test, because we don't have an int_arm_neon_vaclt intrinsic, and instead generate/use vcagt.


https://reviews.llvm.org/D50236





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