[PATCH] D50328: [X86][SSE] Combine (some) target shuffles with multiple uses

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: lib/Target/X86/X86ISelLowering.cpp:39640
+    return RHS;
+
   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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greened wrote:
> This would be best done as a separate change.
Sure, that was what I meant in the summary:

> This also exposes some poor PMULDQ/PMULUDQ codegen which was doing unnecessary upper/lower calculations which will in fact fold to zero/undef - I've included the fix in this patch but can commit it separately as a followup if you wish to better show the effect




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Comment at: test/CodeGen/X86/2012-01-12-extract-sv.ll:12
+; CHECK-NEXT:    vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
+; CHECK-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0]
 ; CHECK-NEXT:    vinsertf128 $1, %xmm0, %ymm0, %ymm0
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greened wrote:
> Can we make this test less brittle by using FileCheck variables?  This goes for pretty much every test in this patch.
I'm sorry but no - its been repeatedly proven that using update_llc_test_checks.py on the majority of x86 tests is the way forward - it speeds up creation of tests (x86 by far has the highest test coverage), makes regeneration of checks trivial and it prevents dodgy code being 'hidden' (either on purpose or by accident). Additionally many x86 subtargets have different instruction behaviours depending on the registers used so hidng the registers behind regexps make it that more difficult to track.


Repository:
  rL LLVM

https://reviews.llvm.org/D50328