[PATCH] D50292: [WebAssembly] Update SIMD binary arithmetic

[Heejin Ahn via Phabricator via llvm-commits]

aheejin added a comment.

Looks OK with some formatting nits



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Comment at: lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp:261
+  case MVT::v4f32:
+  case MVT::v2f64: retType = WebAssembly::ExprType::V128; break;
   case MVT::ExceptRef: retType = WebAssembly::ExprType::ExceptRef; break;
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Can you clang-format this?


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Comment at: lib/Target/WebAssembly/WebAssemblyInstrFormats.td:63
                   list<dag> pattern_r, string asmstr_r = "",
-                  string asmstr_s = "", bits<32> inst = -1> {
+                  string asmstr_s = "", bits<32> simdop= -1> {
   defm "" : I<oops_r, iops_r, oops_s, iops_s, pattern_r, asmstr_r, asmstr_s,
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Nit: space between `simdop` and `=`


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Comment at: lib/Target/WebAssembly/WebAssemblyRegisterInfo.td:66
 def F64 : WebAssemblyRegClass<[f64], 64, (add F64_0)>;
-def V128 : WebAssemblyRegClass<[v4f32, v4i32, v16i8, v8i16], 128, (add V128_0)>;
+def V128 : WebAssemblyRegClass<[v4f32, v2f64, v2i64, v4i32, v16i8, v8i16], 128, (add V128_0)>;
 def EXCEPT_REF : WebAssemblyRegClass<[ExceptRef], 0, (add EXCEPT_REF_0)>;
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Wrap to 80 cols?


Repository:
  rL LLVM

https://reviews.llvm.org/D50292