[llvm] r339040 - [X86] Add test cases to show bad use of "and $0" and "orl $-1" for minsize when the store is volatile

[Craig Topper via llvm-commits]

Author: ctopper
Date: Mon Aug  6 11:44:21 2018
New Revision: 339040

URL: http://llvm.org/viewvc/llvm-project?rev=339040&view=rev
Log:
[X86] Add test cases to show bad use of "and $0" and "orl $-1" for minsize when the store is volatile

If the store is volatile we shouldn't be adding a little that didn't exist in the source.

Modified:
    llvm/trunk/test/CodeGen/X86/store-zero-and-minus-one.ll

Modified: llvm/trunk/test/CodeGen/X86/store-zero-and-minus-one.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store-zero-and-minus-one.ll?rev=339040&r1=339039&r2=339040&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/store-zero-and-minus-one.ll (original)
+++ llvm/trunk/test/CodeGen/X86/store-zero-and-minus-one.ll Mon Aug  6 11:44:21 2018
@@ -141,3 +141,103 @@ entry:
   ret void
 
 }
+
+; FIXME: Make sure we don't use the and/or trick on volatile stores.
+define void @volatile_zero_64(i64* %p) minsize {
+; CHECK32-LABEL: volatile_zero_64:
+; CHECK32:       # %bb.0: # %entry
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT:    andl $0, 4(%eax)
+; CHECK32-NEXT:    andl $0, (%eax)
+; CHECK32-NEXT:    retl
+;
+; CHECK64-LABEL: volatile_zero_64:
+; CHECK64:       # %bb.0: # %entry
+; CHECK64-NEXT:    andq $0, (%rdi)
+; CHECK64-NEXT:    retq
+entry:
+  store volatile i64 0, i64* %p
+  ret void
+}
+
+define void @volatile_zero_32(i32* %p) minsize {
+; CHECK32-LABEL: volatile_zero_32:
+; CHECK32:       # %bb.0: # %entry
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT:    andl $0, (%eax)
+; CHECK32-NEXT:    retl
+;
+; CHECK64-LABEL: volatile_zero_32:
+; CHECK64:       # %bb.0: # %entry
+; CHECK64-NEXT:    andl $0, (%rdi)
+; CHECK64-NEXT:    retq
+entry:
+  store volatile i32 0, i32* %p
+  ret void
+}
+
+define void @volatile_zero_16(i16* %p) minsize {
+; CHECK32-LABEL: volatile_zero_16:
+; CHECK32:       # %bb.0: # %entry
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT:    andw $0, (%eax)
+; CHECK32-NEXT:    retl
+;
+; CHECK64-LABEL: volatile_zero_16:
+; CHECK64:       # %bb.0: # %entry
+; CHECK64-NEXT:    andw $0, (%rdi)
+; CHECK64-NEXT:    retq
+entry:
+  store volatile i16 0, i16* %p
+  ret void
+}
+
+
+define void @volatile_minus_one_64(i64* %p) minsize {
+; CHECK32-LABEL: volatile_minus_one_64:
+; CHECK32:       # %bb.0: # %entry
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT:    orl $-1, 4(%eax)
+; CHECK32-NEXT:    orl $-1, (%eax)
+; CHECK32-NEXT:    retl
+;
+; CHECK64-LABEL: volatile_minus_one_64:
+; CHECK64:       # %bb.0: # %entry
+; CHECK64-NEXT:    orq $-1, (%rdi)
+; CHECK64-NEXT:    retq
+entry:
+  store volatile i64 -1, i64* %p
+  ret void
+}
+
+define void @volatile_minus_one_32(i32* %p) minsize {
+; CHECK32-LABEL: volatile_minus_one_32:
+; CHECK32:       # %bb.0: # %entry
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT:    orl $-1, (%eax)
+; CHECK32-NEXT:    retl
+;
+; CHECK64-LABEL: volatile_minus_one_32:
+; CHECK64:       # %bb.0: # %entry
+; CHECK64-NEXT:    orl $-1, (%rdi)
+; CHECK64-NEXT:    retq
+entry:
+  store volatile i32 -1, i32* %p
+  ret void
+}
+
+define void @volatile_minus_one_16(i16* %p) minsize {
+; CHECK32-LABEL: volatile_minus_one_16:
+; CHECK32:       # %bb.0: # %entry
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT:    orw $-1, (%eax)
+; CHECK32-NEXT:    retl
+;
+; CHECK64-LABEL: volatile_minus_one_16:
+; CHECK64:       # %bb.0: # %entry
+; CHECK64-NEXT:    orw $-1, (%rdi)
+; CHECK64-NEXT:    retq
+entry:
+  store volatile i16 -1, i16* %p
+  ret void
+}