[PATCH] D50270: [x86] When using "and $0" and "orl $-1" to store 0 and -1 for minsize, make sure the store isn't volatile

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.

LGTM  - probably worth committing the new tests with current codegen as a pre-commit.



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Comment at: lib/Target/X86/X86InstrCompiler.td:1046
+  return !cast<StoreSDNode>(N)->isVolatile();
+}]>;
+
----------------
craig.topper wrote:
> RKSimon wrote:
> > Is there any place more generic we can put this? It doesn't seem x86 specific
> It should probably be hoisted to include/llvm/Target/TargetSelectionDAG.td. SystemZ has this already with this name so we'd have to change that too. Do you want me move it and change SystemZ as a pre-patch. Or do you want it folded in here? Or move SystemZ as a followup?
Leaving it here and doing the X86/SystemZ merge into TargetSelectionDAG.td as a followup is fine by me.


https://reviews.llvm.org/D50270