[PATCH] D45437: Support inline asm with multiple 64bit output in 32bit GPR

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

> This fix the bug reported in https://reviews.llvm.org/rL337903

Do we have test coverage for that issue reported in that email?  If not, please add a testcase.



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Comment at: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:7793
+      SDValue Val = ResultValues[i];
+      if (ResultTypes[i]->isSized()) {
+        // If the type of the inline asm call site return value is different but
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isSized()?  How can you end up with an unsized value here?


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Comment at: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:7813
+          // relevant portion.
+          Val = DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), ResultVT, Val);
+        }
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This part of the patch is just whitespace changes?


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Comment at: test/CodeGen/ARM/inlineasm-operand-implicit-cast.ll:175
+  %add = fadd double %asmresult, %asmresult1
+  ret double %add
+}
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Please add a test for multiple return values with matching inputs.


Repository:
  rL LLVM

https://reviews.llvm.org/D45437