[PATCH] D50272: [tablegen] Improve performance of -gen-register-info by replacing barely-necessary std::map with a sorted vector

[Daniel Sanders via Phabricator via llvm-commits]

dsanders created this revision.
dsanders added reviewers: bogner, rtereshin, aditya_nandakumar, volkan.
Herald added subscribers: dexonsmith, mgrang.

This particular map is hardly ever queried and has a phased usage pattern (insert,
iterate, query, insert, iterate) so it's a good candidate for a sorted vector and
std::lower_bound.

This significantly reduces the run time of runTargetDesc() in some circumstances.
One llvm-tblgen invocation in my build improves the time spent in runTargetDesc()
from 9.47s down to 1.10s (~90%) without changing the output. The same invocation
also has 2GB less allocation churn.


Repository:
  rL LLVM

https://reviews.llvm.org/D50272

Files:
  include/llvm/ADT/STLExtras.h
  utils/TableGen/RegisterInfoEmitter.cpp

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