[PATCH] D49229: [InstCombine] Fold redundant masking operations of shifted value

Sam Parker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 2 08:00:59 PDT 2018


samparker added a comment.

So this started life in the DAGCombiner and issues around the implementation were raised and that it would be useful to have earlier in the pipeline. But it seems that it hasn't really be thought, or discussion, about how this would fit well in the existing passes... I think DAG combine has always been the right place for this because we're trying to reuse values - something that DAGs are good for. In DAGCombiner::visitANDLike, we already handle ANDs with SRL operands and the motivating example can be addressed with very little effort:

  +        uint32_t ShiftedMask = CAnd->getZExtValue() << ShiftBits;
  +        SDNode *Res =
  +          DAG.UpdateNodeOperands(N, N0->getOperand(0), DAG.getConstant(ShiftedMask, DL, VT));
  +        if (Res != N)
  +          return DAG.getNode(ISD::SRL, DL, VT, SDValue(Res, 0), N0->getOperand(1));
  +        else
  +          return SDValue(DAG.UpdateNodeOperands(N, N0, SDValue(CAnd, 0)), 0);

I don't know the cost of calling UpdateNodeOperands, potentially twice, but I feel the simplicity suggests that the transform is most suited to the DAG.


https://reviews.llvm.org/D49229





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