[PATCH] D49994: Allow constraining virtual register's class within reason

[Alexey Zhikhartsev via Phabricator via llvm-commits]

alexey.zhikhar added a comment.

All the test failures are mismatches between expected assembly and assembly produced. One exception is `CodeGen/AMDGPU/early-if-convert.ll`, where the backend fails with an assertion:

  llc: lib/Target/AMDGPU/SIInstrInfo.cpp:1794: virtual bool llvm::SIInstrInfo::canInsertSelect(const llvm::MachineBasicBlock&, llvm::ArrayRef<llvm::MachineOperand>, unsigned int, unsigned int, int&, int&, int&) const: Assertion `MRI.getRegClass(FalseReg) == RC' failed.

I will prioritize this higher.


Repository:
  rL LLVM

https://reviews.llvm.org/D49994