[PATCH] D50121: [PowerPC] Do not round values prior to converting to integer

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added a comment.

In https://reviews.llvm.org/D50121#1183765, @tstellar wrote:

> One questions I had after looking into this bug was why does PPCTargetLowering::LowerFP_TO_INTForReuse() extend f32 values to f64 before creating the FCT* instructions?


This is just a convenient canonicalization. On PPC hardware, both single and double precision scalar values have the same double representation in registers. There are instructions that round from double precision to single precision (essentially clear bits that a single precision operand cannot have set and produce any exceptions that should result from the conversion). Furthermore, there are arithmetic instructions that operate on single precision values and produce values that would be unchanged by an aforementioned rounding. But an extend from single precision to double precision is a noop. So adding an FP_EXTEND to keep everything neatly in `f64` values makes sense.
Note that this only applies to floating point scalar values in registers. Vector floating point single precision values actually occupy a 32-bit element each and of course, single precision values are stored in memory as 32-bit entities. So converting between single and double precision vectors of floating point also involves changing the in-register size of the operand.


Repository:
  rL LLVM

https://reviews.llvm.org/D50121