[PATCH] D50137: [AArch64] Add support for got relocated LDR's
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 1 04:16:35 PDT 2018
dmgreen created this revision.
dmgreen added reviewers: t.p.northover, olista01, efriedma, peter.smith, john.brawn.
Herald added a reviewer: javed.absar.
Herald added subscribers: kristof.beyls, eraman.
As a part of adding the tiny codemodel, we need to support ldr's with :got: relocations on them. This seems to be mostly already done, just needs the relocation type support.
Pulled out of https://reviews.llvm.org/D49673.
https://reviews.llvm.org/D50137
Files:
lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
test/MC/AArch64/arm64-elf-relocs.s
test/MC/AArch64/elf-reloc-pcreladdressing.s
test/MC/AArch64/inline-asm-modifiers.s
Index: test/MC/AArch64/inline-asm-modifiers.s
===================================================================
--- test/MC/AArch64/inline-asm-modifiers.s
+++ test/MC/AArch64/inline-asm-modifiers.s
@@ -68,13 +68,17 @@
//APP
adrp x0, :gottprel:var_tlsie
//NO_APP
+ //APP
+ ldr x0, :got:var_got
+ //NO_APP
ret
.Ltmp2:
.size test_inline_modifier_A, .Ltmp2-test_inline_modifier_A
// CHECK: R_AARCH64_ADR_PREL_PG_HI21 var_simple
// CHECK: R_AARCH64_ADR_GOT_PAGE var_got
// CHECK: R_AARCH64_TLSDESC_ADR_PAGE21 var_tlsgd
// CHECK: R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 var_tlsie
+// CHECK: R_AARCH64_GOT_LD_PREL19 var_got
.globl test_inline_modifier_wx
.type test_inline_modifier_wx, at function
Index: test/MC/AArch64/elf-reloc-pcreladdressing.s
===================================================================
--- test/MC/AArch64/elf-reloc-pcreladdressing.s
+++ test/MC/AArch64/elf-reloc-pcreladdressing.s
@@ -7,11 +7,14 @@
adrp x5, :got:some_label
ldr x0, [x5, #:got_lo12:some_label]
+ ldr x0, :got:some_label
+
// OBJ: Relocations [
// OBJ-NEXT: Section {{.*}} .rela.text {
// OBJ-NEXT: 0x0 R_AARCH64_ADR_PREL_LO21 some_label 0x0
// OBJ-NEXT: 0x4 R_AARCH64_ADR_PREL_PG_HI21 some_label 0x0
// OBJ-NEXT: 0x8 R_AARCH64_ADR_GOT_PAGE some_label 0x0
// OBJ-NEXT: 0xC R_AARCH64_LD64_GOT_LO12_NC some_label 0x0
+// OBJ-NEXT: 0x10 R_AARCH64_GOT_LD_PREL19 some_label 0x0
// OBJ-NEXT: }
// OBJ-NEXT: ]
Index: test/MC/AArch64/arm64-elf-relocs.s
===================================================================
--- test/MC/AArch64/arm64-elf-relocs.s
+++ test/MC/AArch64/arm64-elf-relocs.s
@@ -269,3 +269,10 @@
// certainly be accepted when assembling.
add x3, x5, :lo12:imm
// CHECK: add x3, x5, :lo12:imm
+
+ ldr x24, #:got:sym
+ ldr d22, :got:sym
+// CHECK: ldr x24, :got:sym
+// CHECK: ldr d22, :got:sym
+// CHECK-OBJ-LP64: R_AARCH64_GOT_LD_PREL19 sym
+// CHECK-OBJ-LP64: R_AARCH64_GOT_LD_PREL19 sym
\ No newline at end of file
Index: lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
===================================================================
--- lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
+++ lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
@@ -169,6 +169,8 @@
case AArch64::fixup_aarch64_ldr_pcrel_imm19:
if (SymLoc == AArch64MCExpr::VK_GOTTPREL)
return R_CLS(TLSIE_LD_GOTTPREL_PREL19);
+ if (SymLoc == AArch64MCExpr::VK_GOT)
+ return R_CLS(GOT_LD_PREL19);
return R_CLS(LD_PREL_LO19);
case AArch64::fixup_aarch64_pcrel_branch14:
return R_CLS(TSTBR14);
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