[llvm] r338499 - [MIPS GlobalISel] Select global address
Petar Jovanovic via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 1 02:03:23 PDT 2018
Author: petarj
Date: Wed Aug 1 02:03:23 2018
New Revision: 338499
URL: http://llvm.org/viewvc/llvm-project?rev=338499&view=rev
Log:
[MIPS GlobalISel] Select global address
Select G_GLOBAL_VALUE for position dependent code.
Patch by Petar Avramovic.
Differential Revision: https://reviews.llvm.org/D49803
Added:
llvm/trunk/test/CodeGen/Mips/GlobalISel/instruction-select/gloal_address.mir
llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/global_address.ll
llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/global_address.mir
llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address.ll
llvm/trunk/test/CodeGen/Mips/GlobalISel/regbankselect/global_address.mir
Modified:
llvm/trunk/lib/Target/Mips/MipsInstructionSelector.cpp
llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp
llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cpp
Modified: llvm/trunk/lib/Target/Mips/MipsInstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstructionSelector.cpp?rev=338499&r1=338498&r2=338499&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstructionSelector.cpp Wed Aug 1 02:03:23 2018
@@ -166,6 +166,33 @@ bool MipsInstructionSelector::select(Mac
I.eraseFromParent();
return true;
}
+ case G_GLOBAL_VALUE: {
+ if (MF.getTarget().isPositionIndependent())
+ return false;
+
+ const llvm::GlobalValue *GVal = I.getOperand(1).getGlobal();
+ unsigned LUiReg = MRI.createVirtualRegister(&Mips::GPR32RegClass);
+ MachineInstr *LUi, *ADDiu;
+
+ LUi = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LUi))
+ .addDef(LUiReg)
+ .addGlobalAddress(GVal);
+ LUi->getOperand(1).setTargetFlags(MipsII::MO_ABS_HI);
+
+ ADDiu = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu))
+ .addDef(I.getOperand(0).getReg())
+ .addUse(LUiReg)
+ .addGlobalAddress(GVal);
+ ADDiu->getOperand(2).setTargetFlags(MipsII::MO_ABS_LO);
+
+ if (!constrainSelectedInstRegOperands(*LUi, TII, TRI, RBI))
+ return false;
+ if (!constrainSelectedInstRegOperands(*ADDiu, TII, TRI, RBI))
+ return false;
+
+ I.eraseFromParent();
+ return true;
+ }
default:
return false;
Modified: llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp?rev=338499&r1=338498&r2=338499&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp Wed Aug 1 02:03:23 2018
@@ -36,6 +36,9 @@ MipsLegalizerInfo::MipsLegalizerInfo(con
getActionDefinitionsBuilder(G_FRAME_INDEX)
.legalFor({p0});
+ getActionDefinitionsBuilder(G_GLOBAL_VALUE)
+ .legalFor({p0});
+
computeTables();
verify(*ST.getInstrInfo());
}
Modified: llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cpp?rev=338499&r1=338498&r2=338499&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cpp Wed Aug 1 02:03:23 2018
@@ -88,6 +88,7 @@ MipsRegisterBankInfo::getInstrMapping(co
break;
case G_CONSTANT:
case G_FRAME_INDEX:
+ case G_GLOBAL_VALUE:
OperandsMapping =
getOperandsMapping({&Mips::ValueMappings[Mips::GPRIdx], nullptr});
break;
Added: llvm/trunk/test/CodeGen/Mips/GlobalISel/instruction-select/gloal_address.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/GlobalISel/instruction-select/gloal_address.mir?rev=338499&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/GlobalISel/instruction-select/gloal_address.mir (added)
+++ llvm/trunk/test/CodeGen/Mips/GlobalISel/instruction-select/gloal_address.mir Wed Aug 1 02:03:23 2018
@@ -0,0 +1,46 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
+--- |
+
+ @.str = private unnamed_addr constant [11 x i8] c"hello %d \0A\00"
+
+ define void @main() {entry: ret void}
+ declare i32 @printf(i8*, ...)
+
+...
+---
+name: main
+alignment: 2
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.1.entry:
+ ; MIPS32-LABEL: name: main
+ ; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi target-flags(mips-abs-hi) @.str
+ ; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[LUi]], target-flags(mips-abs-lo) @.str
+ ; MIPS32: [[LUi1:%[0-9]+]]:gpr32 = LUi 18838
+ ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi1]], 722
+ ; MIPS32: [[LUi2:%[0-9]+]]:gpr32 = LUi 0
+ ; MIPS32: [[ORi1:%[0-9]+]]:gpr32 = ORi [[LUi2]], 0
+ ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32: $a0 = COPY [[ADDiu]]
+ ; MIPS32: $a1 = COPY [[ORi]]
+ ; MIPS32: JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
+ ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32: $v0 = COPY [[ORi1]]
+ ; MIPS32: RetRA implicit $v0
+ %2:gprb(p0) = G_GLOBAL_VALUE @.str
+ %1:gprb(p0) = COPY %2(p0)
+ %3:gprb(s32) = G_CONSTANT i32 1234567890
+ %4:gprb(s32) = G_CONSTANT i32 0
+ ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ $a0 = COPY %1(p0)
+ $a1 = COPY %3(s32)
+ JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
+ %0:gprb(s32) = COPY $v0
+ ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ $v0 = COPY %4(s32)
+ RetRA implicit $v0
+
+...
Added: llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/global_address.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/global_address.ll?rev=338499&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/global_address.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/global_address.ll Wed Aug 1 02:03:23 2018
@@ -0,0 +1,26 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
+
+ at .str = private unnamed_addr constant [11 x i8] c"hello %d \0A\00"
+
+define i32 @main() {
+ ; MIPS32-LABEL: name: main
+ ; MIPS32: bb.1.entry:
+ ; MIPS32: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @.str
+ ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY [[GV]](p0)
+ ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1234567890
+ ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32: $a0 = COPY [[COPY]](p0)
+ ; MIPS32: $a1 = COPY [[C]](s32)
+ ; MIPS32: JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
+ ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
+ ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32: $v0 = COPY [[C1]](s32)
+ ; MIPS32: RetRA implicit $v0
+entry:
+ %call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i32 signext 1234567890)
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...)
Added: llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/global_address.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/global_address.mir?rev=338499&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/global_address.mir (added)
+++ llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/global_address.mir Wed Aug 1 02:03:23 2018
@@ -0,0 +1,43 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
+--- |
+
+ @.str = private unnamed_addr constant [11 x i8] c"hello %d \0A\00"
+
+ define void @main() {entry: ret void}
+ declare i32 @printf(i8*, ...)
+
+...
+---
+name: main
+alignment: 2
+tracksRegLiveness: true
+body: |
+ bb.1.entry:
+ ; MIPS32-LABEL: name: main
+ ; MIPS32: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @.str
+ ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY [[GV]](p0)
+ ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1234567890
+ ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32: $a0 = COPY [[COPY]](p0)
+ ; MIPS32: $a1 = COPY [[C]](s32)
+ ; MIPS32: JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
+ ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
+ ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32: $v0 = COPY [[C1]](s32)
+ ; MIPS32: RetRA implicit $v0
+ %2:_(p0) = G_GLOBAL_VALUE @.str
+ %1:_(p0) = COPY %2(p0)
+ %3:_(s32) = G_CONSTANT i32 1234567890
+ %4:_(s32) = G_CONSTANT i32 0
+ ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ $a0 = COPY %1(p0)
+ $a1 = COPY %3(s32)
+ JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
+ %0:_(s32) = COPY $v0
+ ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ $v0 = COPY %4(s32)
+ RetRA implicit $v0
+
+...
Added: llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address.ll?rev=338499&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address.ll Wed Aug 1 02:03:23 2018
@@ -0,0 +1,34 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
+
+ at .str = private unnamed_addr constant [11 x i8] c"hello %d \0A\00"
+
+define i32 @main() {
+; MIPS32-LABEL: main:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: lui $1, %hi($.str)
+; MIPS32-NEXT: addiu $4, $1, %lo($.str)
+; MIPS32-NEXT: lui $1, 18838
+; MIPS32-NEXT: ori $5, $1, 722
+; MIPS32-NEXT: lui $1, 0
+; MIPS32-NEXT: ori $2, $1, 0
+; MIPS32-NEXT: sw $2, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: jal printf
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: lw $1, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: move $2, $1
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: addiu $sp, $sp, 24
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+entry:
+ %call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i32 signext 1234567890)
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...)
+
Added: llvm/trunk/test/CodeGen/Mips/GlobalISel/regbankselect/global_address.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/GlobalISel/regbankselect/global_address.mir?rev=338499&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/GlobalISel/regbankselect/global_address.mir (added)
+++ llvm/trunk/test/CodeGen/Mips/GlobalISel/regbankselect/global_address.mir Wed Aug 1 02:03:23 2018
@@ -0,0 +1,44 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
+--- |
+
+ @.str = private unnamed_addr constant [11 x i8] c"hello %d \0A\00"
+
+ define void @main() {entry: ret void}
+ declare i32 @printf(i8*, ...)
+
+...
+---
+name: main
+alignment: 2
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.1.entry:
+ ; MIPS32-LABEL: name: main
+ ; MIPS32: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @.str
+ ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY [[GV]](p0)
+ ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1234567890
+ ; MIPS32: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0
+ ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32: $a0 = COPY [[COPY]](p0)
+ ; MIPS32: $a1 = COPY [[C]](s32)
+ ; MIPS32: JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
+ ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $v0
+ ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32: $v0 = COPY [[C1]](s32)
+ ; MIPS32: RetRA implicit $v0
+ %2:_(p0) = G_GLOBAL_VALUE @.str
+ %1:_(p0) = COPY %2(p0)
+ %3:_(s32) = G_CONSTANT i32 1234567890
+ %4:_(s32) = G_CONSTANT i32 0
+ ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ $a0 = COPY %1(p0)
+ $a1 = COPY %3(s32)
+ JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
+ %0:_(s32) = COPY $v0
+ ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ $v0 = COPY %4(s32)
+ RetRA implicit $v0
+
+...
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