[PATCH] D49562: [X86][SSE] Use ISD::MULHU for constant/non-zero ISD::SRL lowering (PR38151)

[Simon Pilgrim via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL338407: [X86][SSE] Use ISD::MULHU for constant/non-zero ISD::SRL lowering (PR38151) (authored by RKSimon, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D49562?vs=158236&id=158333#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D49562

Files:
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/test/CodeGen/X86/combine-sdiv.ll
  llvm/trunk/test/CodeGen/X86/combine-shl.ll
  llvm/trunk/test/CodeGen/X86/vector-shift-lshr-128.ll
  llvm/trunk/test/CodeGen/X86/vector-shift-lshr-256.ll

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