[PATCH] D50061: Proposal to add Exegesis Configuration to td files.

[Guillaume Chatelet via Phabricator via llvm-commits]

gchatelet created this revision.
gchatelet added reviewers: RKSimon, craig.topper, courbet.
Herald added subscribers: llvm-commits, mgorny.

This patch is not to be submitted as is. I'd like to get some input first, but starting with some code will help.
Some instruction's latency depend on the value of its operands (e.g. DIV with NaN or subnormal takes longer to execute than normal numbers).
For llvm-exegesis to explore the latency space of the instructions it needs some special knowledge of the instruction.
I envision that the best place to store this knowledge is the td file.

Let's take the following div example, by choosing special starting values we can make sure that even with 100000 iterations divss will always stay in the normal range.

> movss xmm0, 0x3F800000 // 1.0f
>  movss xmm1, 0x3F800001 // 1.0f + 1ulp
>  .rept 100000
>  divss xmm0, xmm1
>  .endr

So an exegesis configuration for divss would be (1.0f, 1.0f + ulp),
Another could be (1.0f, 0.0f) to test infinity generation,
Another could be (NaN, Inf) to test the impact of NaNs...

The configuration should allow to specify the `bit precise` values and to pack them in case of vector instructions.

This configuration should work for all floating point types (including X87) and for as many arithmetic operations as possible (div, mul, sqrt, ...).

It can be part of the Instruction Records or separated as it is in this Patch.


Repository:
  rL LLVM

https://reviews.llvm.org/D50061

Files:
  include/llvm/Target/Target.td
  include/llvm/Target/TargetExegesis.td
  lib/Target/X86/CMakeLists.txt
  lib/Target/X86/X86.td
  lib/Target/X86/X86ExegesisConfigurations.td
  utils/TableGen/CMakeLists.txt
  utils/TableGen/InstrSemInfoEmitter.cpp
  utils/TableGen/TableGen.cpp
  utils/TableGen/TableGenBackends.h

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